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參數(shù)資料
| 型號： | CA3260E |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 運動控制電子 |
| 英文描述： | 4MHz, BiMOS Operational Amplifier with MOSFET Input/CMOS Output |
| 中文描述： | DUAL OP-AMP, 15000 uV OFFSET-MAX, PDIP8 |
| 文件頁數(shù)： | 2/3頁 |
| 文件大?。?/td> | 39K |
| 代理商： | CA3260E |
2
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage (V+ to V-). . . . . . . . . . . . . . . . . . . . . . . . . . . 16V
DC Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Terminal Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
θ
JA
(
o
C/W)
100
θ
JC
(
o
C/W)
N/A
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C, Typical Values Intended Only for Design Guidance
PARAMETER
SYMBOL
TEST CONDITIONS
TYPICAL VALUES
UNITS
CA3260A
CA3260
Input Resistance
RI
C
I
V
S
=
±
7.5V
1.5
1.5
T
Input Capacitance
f = 1MHz, V
S
=
±
7.5V
4.3
4.3
pF
Unity Gain Crossover Frequency
f
T
V
S
=
±
7.5V
4
4
MHz
Slew Rate
SR
V
S
=
±
7.5V
10
10
V/
μ
s
Transient Response
Rise Time
t
r
C
L
= 25pF, R
L
= 2k
,
A
V
= +1,
V
S
=
±
7.5V
0.09
0.09
μ
s
Overshoot
OS
10
10
%
Settling Time (to <0.1
%
, V
IN
= 4V
P-P
)
t
S
C
L
= 25pF, R
L
= 2k
,
A
V
= +1,
V
S
=
±
7.5V
1.8
1.8
μ
s
Input Offset Voltage
V
IO
V+ = 5V, V- = 0V
2
6
mV
Input Offset Current
I
IO
V+ = 5V, V- = 0V
0.1
0.1
pA
Input Current
I
I
V+ = 5V, V- = 0V
2
2
pA
Common Mode Rejection Ratio
CMRR
V+ = 5V, V- = 0V
70
60
dB
Large Signal Voltage Gain
A
OL
V
O
= 4V
P-P
, R
L
= 20k
,
V+ = 5V, V- = 0V
100
100
kV/V
100
100
dB
Common Mode Input Voltage Range
V
ICR
V+ = 5V, V- = 0V
0 to 2.5
0 to 2.5
V
Supply Current
I+
V
O
= 5V, R
L
=
∞,
V+ = 5V, V- = 0V
V
O
= 2.5V, R
L
=
∞,
V+ = 5V, V- = 0V
1
1
mA
1.2
1.2
mA
Power Supply Rejection Ratio
PSRR
V
IO
/
V+, V+ = 5V, V- = 0V
200
200
μ
V/V
Electrical Specifications
For Each Amplifier at T
A
= 25
o
C, V+ = 15V, V- = 0V, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST
CONDITIONS
CA3260A
CA3260
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
Input Offset Voltage
|V
IO
|
V
S
=
±
7.5V
-
2
5
-
6
15
mV
Input Offset Current
|I
IO
|
V
S
=
±
7.5V
-
0.5
20
-
0.5
30
pA
Input Current
I
I
V
S
=
±
7.5V
-
5
30
-
5
50
pA
Large Signal Voltage Gain
A
OL
V
O
= 10V
P-P
,
R
L
= 10k
50
320
-
50
320
-
kV/V
94
110
-
94
110
-
dB
Common Mode Rejection Ratio
CMRR
80
95
-
70
90
-
dB
CA3260, CA3260A
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