參數(shù)資料
型號： CA3252M
廠商： HARRIS SEMICONDUCTOR
元件分類： 外設(shè)及接口
英文描述： Quad Gated Non-Inverting Power Driver
中文描述： 1 A AND GATE BASED PRPHL DRVR, PDSO20
文件頁數(shù)： 4/6頁
文件大?。?/td> 53K
代理商： CA3252M
4
Absolute Maximum Ratings
Thermal Information
Output Voltage, V
CEX
. . . . . . . . . . . . . . . . . . . . . . . . . -0.7 to 50V
DC
Logic Supply Voltage, V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Logic Input Voltage, V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . .-0.7 to 15V
Output Sustaining Voltage, V
CE(SUS)
. . . . . . . . . . . . . . . . . . 35V
DC
Output Current, I
O
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . 1A
DC
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40
o
C to 105
o
C
Thermal Resistance (Typical, Note 2)
CA3252E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CA3252M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature Soldering (10s Max) . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JAo
C/W
45
54
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The Maximum Ambient Temperature is limited for the sustained conditions of the I
CC(ON)
Supply Current test with all Outputs ON. The total
DC current for the CA3252 with all 4 outputs ON should not exceed 0.7A at each output for a total of (4 X 0.7A + Max. I
CC
) ~ 2.9A. This
level of sustained current will significantly increase the on-chip temperature due to increased dissipation. Under any condition, the Absolute
Maximum Junction Temperature must not exceed150
o
C. While any one loaded output may exceed 0.7A, the maximum rating limit is 1A.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= -40
o
C to 105
o
C, V
CC
= V
EN
= 5V; Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
UNITS
Output Sustaining Voltage
V
CE(SUS)
I
C
= 100mA, V
IN
= 2V, V
EN
= 2V
35
-
V
Output Leakage Current
I
CEX
V
CE
= 50V, V
IN
= 2V, V
EN
= 0.8V
-
100
μ
A
Collector to Emitter Saturation Voltage
V
CE(SAT)
I
C
= 100mA, V
IN
= 0.8V
-
0.3
V
I
C
= 300mA, V
IN
= 0.8V
-
0.5
V
I
C
= 600mA, V
IN
= 0.8V
-
0.8
V
Input Low Voltage
V
IL
-
0.8
V
Input Low Current
I
IL
V
IN
= 0.4V
-15
10
μ
A
Input High Voltage
V
IH
I
C
= 600mA
2
-
V
Input High Current
I
IH
I
C
= 600mA, V
IN
= 4.5V
-10
-10
μ
A
Logic Supply Current, All Outputs ON
I
CC(ON)
I
C
= 600mA, All Outputs ON (Note 1)
-
90
mA
Logic Supply Current, All Outputs OFF
I
CC(OFF)
All Outputs OFF
-
10
mA
Clamp Diode Leakage Current
I
R
V
R
= 50V (Diode Reverse Voltage)
-
100
μ
A
Clamp Diode Forward Voltage
V
F
I
F
= 0.6A
-
1.8
V
I
F
= 1.2A
-
2.0
V
Output Current
I
OUT
V
IN
= 0.4V, V
BATT
= +13V,
Output Load = 10
0.9
-
A
Turn-ON Propagation Delay Time
t
PHL
I
C
= 600mA
-
10
μ
s
Turn-OFF Propagation Delay Time
t
PLH
I
C
= 600mA
-
10
μ
s
Low Enable Voltage
V
ENL
-
0.8
V
Low Enable Current
I
ENL
V
EN
= 0.4V
-15
10
μ
A
High Enable Voltage
V
ENH
2.0
-
V
High Enable Current
I
ENH
V
EN
≥
2V
-250
+250
μ
A
CA3252
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