參數(shù)資料
型號(hào): CA3228
廠商: Intersil Corporation
英文描述: Speed Control System with Memory
中文描述: 速度與記憶體控制系統(tǒng)
文件頁(yè)數(shù): 6/9頁(yè)
文件大?。?/td> 113K
代理商: CA3228
10-36
CA3228
Device Description and Operation
The functional block diagram and Figures 1, 2 show the
speed- control flow chart, and a typical automotive speed-
control application, respectively.
Command Decoder and Delay Logics (Pins 3,4)
Driver commands are input to pin 3 through the Driver
Command Line. These signals are encoded on a single line
as voltage levels selected by switches which adjust a resistor
divider network.
The voltage level established is compared to a reference
level which decodes the command. A command level greater
than V
CC
+ 0.8V turns the system On, enabling dynamic
control. Once the system is enabled, a voltage level of
0.88V
CC
, 0.66V
CC
, and 0.38V
CC
decodes the RESUME,
ACCEL, and COAST command, respectively. A driver
command of 0.12V
CC
or less turns the system Off.
The Driver Command Delay established by the current
sources and a capacitor at pin 4 assures that ON, OFF,
ACCEL, and COAST commands are considered valid only if
longer than 50ms. The time for RESUME is 330ms.
Control Logic
The Control Logic accepts signals from the command
decoder and other sensors. It causes the memory to be
updated when operating in ACCEL and COAST modes. It
will put the system in Standby mode if brakes are applied, if
the speed error exceeds 11mph, or if the vehicle speed
drops below the minimum Speed Lockout (25mph). It will
return the vehicle to the previous set memory speed when a
RESUME command is given.
Frequency to Voltage Converter (Pins 8-11)
The speed sensor input f
S
at pin 8 is an AC signal whose
frequency is directly proportional to the vehicle speed at
approximately 2.22Hz/mph The current sources, capacitor
and comparators at pin 9 cause equal rise and fall times to
occur at pin 9 on the positive- and negative-going slopes of
the sensor input. Pulse currents of time duration equal to the
rise and fall times are used to charge the parallel resistor
capacitor combination at pin 10 to give a voltage (V
S
) at pin
10 proportional to frequency at approximately 27mV/Hz. The
f
S
frequency range may be altered by changing the values of
the filter capacitors at pins 8 and 9. However, the maximum-
to-minimum frequency ratio will remain fixed.
FIGURE 4. TYPICAL D/A MEMORY VOLTAGE, V
M
vs
FREQUENCY
Memory Voltage, V
M
(Pin 6)
Upon release of the ACCEL or COAST switches the voltage,
representing vehicle speed V
S
determined by the output
from the frequency-to-voltage converter, is stored as a
binary number in a 9 bit counter. A memory update compar-
ator allows clocking of the counter until memory voltage V
M
equals V
S
. The output of the counter controls a ladder
network which provides memory voltage V
M
at pin 6.
Analog Accelerate and Resume Generator (Pins 14,15)
Numerous functions are combined in what is called the
Analog Accelerate and Resume Generator. The circuit
switches the signal output at pin 15 depending on the mode
of operation. In the Accelerate and Resume mode the
capacitor at pin 15 is charged at a fixed rate [450mV/(R
EXT
)
(C
EXT
)]. In the Cruise mode pin 15 follows the memory
voltage (V
M
) and in the On, Off, Brake, Redundant Brake,
Minimum Speed Lockout, and Coast modes, pin 15 follows
the voltage representing vehicle speed (V
S
).
FIGURE 5. TYPICAL CHARACTERISTIC F/V CONVERTER
OUTPUT, V
S
vs FREQUENCY
Error Amplifier (Pin 16)
In the Cruise mode the Error Amplifier determines the
difference between the set memory speed (V
M
) and the
actual speed (V
S
). This error signal is fed to the control
amplifier where it defines whether VAC or VENT is required.
The error signal represents deviation in vehicle speed from
the memory or set speed condition. The Error signal is also
used to control the Redundant Brake feature.
Redundant Brake Comparator
When the error output drops below approximately 0.42V
CC
,
the Redundant Brake output is activated. Redundant Brake
causes the chip to go into the Standby mode.
Control Amplifier (Pins 18, 20)
The Control Amplifier is an op amp using external
components to set the gain. Inputs to the Control Amplifier
are from the Error Amplifier output, servo position sensor
and align output. The output of the Control Amplifier controls
the VAC and VENT outputs.
VAC, VENT and Gate-Driver Outputs (Pins 21, 22, 23)
The VAC, VENT and Gate Outputs are open collector
devices used to control the throttle position. For the system
M
M
6
5
4
3
2
1
0
0
50
100
150
200
FREQUENCY, f
S
(Hz)
+85
o
C
+25
o
C
-40
o
C
M
M
6
5
4
3
2
1
0
0
50
100
150
200
FREQUENCY, f
S
(Hz)
+85
o
C
+25
o
C
-40
o
C
250
-40
o
C
相關(guān)PDF資料
PDF描述
CA3228E Speed Control System with Memory
CA3240AE1 Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
CA3240AE Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
CA3240E Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output
CA3240 Dual, 4.5MHz, BiMOS Operational Amplifier with MOSFET Input/Bipolar Output(雙路、4.5MHz、BiMOS運(yùn)算放大器(MOSFET輸入,雙極輸出))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CA3228E 制造商:Rochester Electronics LLC 功能描述:- Bulk
CA3228E WAF 制造商:Harris Corporation 功能描述:
CA32306015 制造商:Belden Inc 功能描述:PIGTAIL-B 10GX CMP BLU 15FT
CA32306020 制造商:Belden Inc 功能描述:PIGTAIL-B 10GX CMP BLU 20FT
CA32306050 制造商:Belden Inc 功能描述:PIGTAIL-B 10GX CMP BLU 50FT