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參數(shù)資料
| 型號： | CA3227M96 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 小信號晶體管 |
| 英文描述： | High-Frequency NPN Transistor Array For Low-Power Applications at Frequencies Up to 1.5GHz |
| 中文描述： | 5 CHANNEL, VHF BAND, Si, NPN, RF SMALL SIGNAL TRANSISTOR, MS-012AC |
| 封裝： | PLASTIC, SOIC-16 |
| 文件頁數(shù)： | 2/7頁 |
| 文件大?。?/td> | 64K |
| 代理商： | CA3227M96 |
2
Absolute Maximum Ratings
Thermal Information
Collector to Emitter Voltage (V
CEO
). . . . . . . . . . . . . . . . . . . . . . . 8V
Collector to Base Voltage (V
CBO
) . . . . . . . . . . . . . . . . . . . . . . . 12V
Collector to Substrate Voltage (V
CIO
, Note 1) . . . . . . . . . . . . . . 20V
Collector Current (I
C
). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
Thermal Resistance (Typical, Note 2)
16 Ld PDIP Package . . . . . . . . . . . . . . . . . . . . . . . .
16 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Power Dissipation (Any One Transistor) . . . . . . . . 85mW
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package). . . . . . . . 150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
θ
JA
(
o
C/W)
90
185
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Thecollectorofeachtransistorofthesedevicesisisolatedfromthesubstratebyanintegraldiode.Thesubstrate(Terminal5)mustbeconnected
to the most negative point in the external circuit to maintain isolation between transistors and to provide for normal transistor action.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
T
A
= 25
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS FOR EACH TRANSISTOR
Collector to Base Breakdown Voltage
V
(BR)CBO
I
C
= 10
μ
A, I
E
= 0
12
20
-
V
Collector to Emitter Breakdown Voltage
V
(BR)CEO
I
C
= 1mA, I
B
= 0
8
10
-
V
Collector to Substrate Breakdown Voltage V
(BR)CIO
I
C1
= 10
μ
A, I
B
= 0, I
E
= 0
20
-
-
V
Emitter Cutoff Current (Note 3)
I
EBO
V
EB
= 4.5V, I
C
= 0
-
-
10
μ
A
Collector Cutoff Current
I
CEO
V
CE
= 5V, I
B
= 0
-
-
1
μ
A
Collector Cutoff Current
I
CBO
V
CB
= 8V, I
E
= 0
-
-
100
nA
DC Forward Current Transfer Ratio
h
FE
V
CE
= 6V
I
C
= 10mA
-
110
-
I
C
= 1mA
40
150
-
I
C
= 0.1mA
-
150
-
Base to Emitter Voltage
V
BE
V
CE
= 6V
I
C
= 1mA
0.62
0.71
0.82
V
Collector to Emitter Saturation Voltage
V
CE SAT
I
C
= 10mA, I
B
= 1mA
-
0.13
0.50
V
Base to Emitter Saturation Voltage
V
BE SAT
I
C
= 10mA, I
B
= 1mA
0.74
-
0.94
V
NOTE:
3. On small-geometry, high-frequency transistors, it is very good practice never to take the Emitter Base Junction into reverse breakdown. To do
so may permanently degrade the h
FE
. Hence, the use of I
EBO
rather than V
(BR)EBO
. These devices are also susceptible to damage by
electrostatic discharge and transients in the circuits in which they are used. Moreover, CMOS handling procedures should be employed.
CA3227
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