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參數(shù)資料
| 型號(hào)： | CA3130E |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 14/17頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP BIMOS SGL 15MHZ 8-DIP |
| 標(biāo)準(zhǔn)包裝： | 50 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 30 V/µs |
| 增益帶寬積： | 15MHz |
| 電流 - 輸入偏壓： | 5pA |
| 電壓 - 輸入偏移： | 8000µV |
| 電流 - 電源： | 10mA |
| 電流 - 輸出 / 通道： | 45mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 16 V，±2.5 V ~ 8 V |
| 工作溫度： | -55°C ~ 125°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 8-DIP（0.300"，7.62mm） |
| 供應(yīng)商設(shè)備封裝： | 8-PDIP |
| 包裝： | 管件 |
| 其它名稱： | CA3130 |
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6
Input Current Variation with Common Mode Input
Voltage
As shown in the Table of Electrical Specifications, the input
current for the CA3130 Series Op Amps is typically 5pA at
TA = 25oC when Terminals 2 and 3 are at a common-mode
potential of +7.5V with respect to negative supply Terminal 4.
Figure 3 contains data showing the variation of input current
as a function of common-mode input voltage at TA = 25oC.
These data show that circuit designers can advantageously
exploit these characteristics to design circuits which typically
require an input current of less than 1pA, provided the
common-mode input voltage does not exceed 2V. As
previously noted, the input current is essentially the result of
the leakage current through the gate-protection diodes in the
input circuit and, therefore, a function of the applied voltage.
Although the finite resistance of the glass terminal-to-case
insulator of the metal can package also contributes an
increment of leakage current, there are useful compensating
factors. Because the gate-protection network functions as if
it is connected to Terminal 4 potential, and the Metal Can
case of the CA3130 is also internally tied to Terminal 4, input
Terminal 3 is essentially “guarded” from spurious leakage
currents.
Offset Nulling
Offset-voltage nulling is usually accomplished with a
100,000
potentiometer connected across Terminals 1 and
5 and with the potentiometer slider arm connected to
Terminal 4. A fine offset-null adjustment usually can be
effected with the slider arm positioned in the mid-point of the
potentiometer’s total range.
Input-Current Variation with Temperature
The input current of the CA3130 Series circuits is typically
5pA at 25oC. The major portion of this input current is due to
leakage current through the gate-protective diodes in the
input circuit. As with any semiconductor-junction device,
including op amps with a junction-FET input stage, the
leakage current approximately doubles for every 10oC
increase in temperature. Figure 4 provides data on the
typical variation of input bias current as a function of
temperature in the CA3130.
In applications requiring the lowest practical input current
and incremental increases in current because of “warm-up”
effects, it is suggested that an appropriate heat sink be used
with the CA3130. In addition, when “sinking” or “sourcing”
significant output current the chip temperature increases,
causing an increase in the input current. In such cases, heat-
sinking can also very markedly reduce and stabilize input
current variations.
Input Offset Voltage (VIO) Variation with DC Bias
and Device Operating Life
It is well known that the characteristics of a MOSFET device
can change slightly when a DC gate-source bias potential is
applied to the device for extended time periods. The
magnitude of the change is increased at high temperatures.
Users of the CA3130 should be alert to the possible impacts
of this effect if the application of the device involves extended
operation at high temperatures with a significant differential
DC bias voltage applied across Terminals 2 and 3. Figure 5
shows typical data pertinent to shifts in offset voltage
encountered with CA3130 devices (metal can package)
during life testing. At lower temperatures (metal can and
plastic), for example at 85oC, this change in voltage is
considerably less. In typical linear applications where the
differential voltage is small and symmetrical, these
incremental changes are of about the same magnitude as
those encountered in an operational amplifier employing a
bipolar transistor input stage. The 2VDC differential voltage
example represents conditions when the amplifier output
stage is “toggled”, e.g., as in comparator applications.
10
7.5
5
2.5
0
-1
012
3456
7
INPUT CURRENT (pA)
INPUT
V
O
L
T
A
G
E
(V)
TA = 25
oC
3
2
7
4
8
6
PA
VIN
CA3130
15V
TO
5V
0V
TO
-10V
V+
V-
FIGURE 3. INPUT CURRENT vs COMMON-MODE VOLTAGE
VS = ±7.5V
4000
1000
100
10
1
-80
-60
-40
-20
0
20
40
60
80
100 120 140
INPUT
CU
RRE
NT
(pA)
TEMPERATURE (oC)
FIGURE 4. INPUT CURRENT vs TEMPERATURE
CA3130, CA3130A
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CA3130E11 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| CA3130EX | 制造商:Rochester Electronics LLC 功能描述:BIMOS OP AMP MOSFET IN/ CMOS OUT BURN-IN 8 PDIP COM - Bulk |
| CA3130EZ | 功能描述:運(yùn)算放大器 - 運(yùn)放 W/ANNEAL OPAMP 15MHZ LWBIAS 0 03NA MIL RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| CA3130M | 功能描述:IC OP AMP 15MHZ BIMOS 8-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:2pA 電壓 - 輸入偏移:1000µV 電流 - 電源:85µA 電流 - 輸出 / 通道:20mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOICN 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:680 (CN2011-ZH PDF) 其它名稱:MCP6L04T-E/SLCT |
| CA3130M96 | 功能描述:IC OP AMP 15MHZ BIMOS 8-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 放大器類型:通用 電路數(shù):4 輸出類型:滿擺幅 轉(zhuǎn)換速率:0.6 V/µs 增益帶寬積:1MHz -3db帶寬:- 電流 - 輸入偏壓:2pA 電壓 - 輸入偏移:1000µV 電流 - 電源:85µA 電流 - 輸出 / 通道:20mA 電壓 - 電源，單路/雙路(±):1.8 V ~ 6 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOICN 包裝:剪切帶 (CT) 產(chǎn)品目錄頁(yè)面:680 (CN2011-ZH PDF) 其它名稱:MCP6L04T-E/SLCT |
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