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參數(shù)資料
| 型號(hào)： | CA3096M |
| 廠商： | HARRIS SEMICONDUCTOR |
| 元件分類： | 小信號(hào)晶體管 |
| 英文描述： | NPN/PNP Transistor Arrays |
| 中文描述： | 50 mA, 35 V, 5 CHANNEL, NPN AND PNP, Si, SMALL SIGNAL TRANSISTOR, MS-012-AC |
| 封裝： | MS-012AC, 16 PIN |
| 文件頁(yè)數(shù)： | 3/14頁(yè) |
| 文件大?。?/td> | 133K |
| 代理商： | CA3096M |
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3
I
CEO
V
CE
= -10V,
I
B
= 0
I
C
= -100
μ
A,
I
B
= 0
I
C
= -10
μ
A,
I
E
= 0
I
E
= -10
μ
A,
I
C
= 0
I
EI
= 10
μ
A,
I
B
= I
C
= 0
-
-0.12
-1000
-
-0.12
-100
-
-0.12
-1000
nA
V
(BR)CEO
-40
-75
-
-40
-75
-
-24
-30
-
V
V
(BR)CBO
-40
-80
-
-40
-80
-
-24
-60
-
V
V
(BR)EBO
-40
-100
-
-40
-100
-
-24
-80
-
V
V
(BR)ElO
40
100
-
40
100
-
24
80
-
V
V
CE SAT
I
C
= -1mA,
I
B
= -100
μ
A
I
C
= -100
μ
A,
V
CE
= -5V
I
C
= -100
μ
A,
V
CE
= -5V
-
-0.16
-0.4
-
-0.16
-0.4
-
-0.16
-0.4
V
V
BE
(Note 4)
-0.5
-0.6
-0.7
-0.5
-0.6
-0.7
-0.5
-0.6
-0.7
V
h
FE
(Note 4)
40
85
250
40
85
250
30
85
300
I
C
= -1mA,
V
CE
= -5V
I
C
= -100
μ
A,
V
CE
= -5V
20
47
200
20
47
200
15
47
200
|
V
BE
/
T| (Note 4)
-
2.2
-
-
2.2
-
-
2.2
-
mV/
o
C
I
CBO
Collector-Cutoff Current
V
Z
Emitter-to-Base Zener Voltage
I
CEO
Collector-Cutoff Current
V
CE SAT
Collector-to-Emitter Saturation Voltage
V
(BR)CEO
Collector-to-Emitter Breakdown Voltage
V
BE
Base-to-Emitter Voltage
V
(BR)CBO
Collector-to-Base Breakdown Voltage
h
FE
|
V
BE
/
T| Magnitude of Temperature Coefficient:
(for each transistor)
DC Forward-Current Transfer Ratio
V
(BR)CIO
Collector-to-Substrate Breakdown Voltage
V
(BR)EBO
Emitter-to-Base Breakdown Voltage
NOTE:
4. Actual forcing current is via the emitter for this test.
Electrical Specifications
For Equipment Design At T
A
= 25
o
C (CA3096A Only)
PARAMETER
SYMBOL
TEST CONDITIONS
CA3096A
UNITS
MIN
TYP
MAX
FOR TRANSISTORS Q
1
AND Q
2
(AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
|VIO|
V
CE
= 5V, I
C
= 1mA
-
0.3
5
mV
Absolute Input Offset Current
|I
IO
|
-
0.07
0.6
μ
A
Absolute Input Offset Voltage
Temperature Coefficient
-
1.1
-
μ
V/
o
C
FOR TRANSISTORS Q
4
AND Q
5
(AS A DIFFERENTIAL AMPLIFIER)
Absolute Input Offset Voltage
|V
IO
|
V
CE
= -5V, I
C
= -100
μ
A
R
S
= 0
-
0.15
5
mV
Absolute Input Offset Current
|I
IO
|
-
2
250
nA
Absolute Input Offset Voltage
Temperature Coefficient
-
0.54
-
μ
V/
o
C
Electrical Specifications
For Equipment Design, At T
A
= 25
o
C
(Continued)
PARAMETER
TEST
CONDITIONS
CA3096
CA3096A
CA3096C
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
-----------------
-----------------
CA3096, CA3096A, CA3096C
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CA3097 | THYRISTOR/TRANSISTOR ARRAY |
| CA3098 | Programmable Schmitt Trigger with Memory, Dual Input Precision Level Detector |
| CA3098E | Programmable Schmitt Trigger with Memory, Dual Input Precision Level Detector |
| CA3100 | 38MHz, Operational Amplifier |
| CA3100E | 38MHz, Operational Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CA3096M96 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:NPN/PNP Transistor Arrays |
| CA3097 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:THYRISTOR/TRANSISTOR ARRAY |
| CA3097E | 制造商:Harris Corporation 功能描述: |
| CA3097H WAF | 制造商:Harris Corporation 功能描述: |
| CA3098 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Programmable Schmitt Trigger with Memory, Dual Input Precision Level Detector |
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