參數(shù)資料
型號(hào)： CA3054
廠商： INTERSIL CORP
元件分類： 運(yùn)動(dòng)控制電子
英文描述： Dual Independent Differential Amp for Low Power Applications from DC to 120MHz
中文描述： DUAL OP-AMP, 5000 uV OFFSET-MAX, PDIP14
封裝： PLASTIC, DIP-14
文件頁(yè)數(shù)： 2/8頁(yè)
文件大?。?/td> 81K
代理商： CA3054
2
Absolute Maximum Ratings
T
A
= 25
o
C
Thermal Information
Collector-to-Emitter Voltage, V
CEO
. . . . . . . . . . . . . . . . . . . . . . 15V
Collector-to-Base Voltage, V
CBO
. . . . . . . . . . . . . . . . . . . . . . . . 20V
Collector-to-Substrate Voltage, V
CIO
(Note 1). . . . . . . . . . . . . . 20V
Emitter-to-Base Voltage, V
EBO
. . . . . . . . . . . . . . . . . . . . . . . . . . 5V
Collector Current, I
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . . . 0
o
C to 85
o
C
Thermal Resistance (Typical, Note 2)
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . .175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . .150
o
C
Maximum Storage Temperature Range. . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
Maximum Power Dissipation (Any One Transistor) . . . . . . . 300mW
θ
JA
(
o
C/W)
130
140
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The collector of each transistor of the CA3054 is isolated from the substrate by an integral diode. The substrate must be connected to a voltage
which is more negative than any collector voltage in order to maintain isolation between transistors and provide for normal transistor action. The
substrate should be maintained at signal (AC) ground by means of a suitable grounding capacitor, to avoid undesired coupling between transistors.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Maximum Voltage Ratings
Maximum
Current Ratings
The following chart gives the range of voltages which can be applied to the terminals listed vertically with respect to the termi-
nals listed horizontally. For example, the voltage range of the vertical Terminal 2 with respect to Terminal 4 is +15V to -5V.
(NOTE 4)
TERM
NO.
13
14
1
2
3
4
6
7
8
9
11
12
5
(NOTE 4)
TERM
NO.
I
IN
mA
I
OUT
mA
13
0, -20
Note 3
+5, -5
Note 3 +15, -5 Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
Note 3
13
5
0.1
14
Note 3 Note 3 Note 3
+20, 0
Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
+20, 0
14
50
0.1
1
+20, 0
Note 3
+20, 0
Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
+20, 0
1
50
0.1
2
Note 3 +15, -5 Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
Note 3
2
5
0.1
3
+1, -5
Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
Note 3
3
5
0.1
4
Note 3 Note 3 Note 3 Note 3 Note 3
Note 3
Note 3
4
0.1
50
6
0, -20
Note 3
+5, -5
Note 3
+15, -5
Note 3
6
5
0.1
7
Note 3 Note 3 Note 3
Note 3
+20, 0
7
50
0.1
8
+20, 0
Note 3
Note 3
+20, 0
8
50
0.1
9
Note 3
+15, -5
Note 3
9
5
0.1
11
-1, -5
Note 3
11
5
0.1
12
Note 3
12
0.1
50
5
Ref.
Sub-
strate
NOTES:
3. Voltages are not normally applied between these terminals. Voltages appearing between these terminals will be safe
if the specified limits between all other terminals are not exceeded.
4. Terminal No. 10 of CA3054 is not used.
Electrical Specifications
T
A
= 25
o
C
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC CHARACTERISTICS
For Each Differential Amplifier
Input Offset Voltage (Figure 8)
V
IO
I
IO
I
I
V
CB
= 3V, I
E(Q3)
= I
E(Q4)
= 2mA
V
CB
= 3V, I
E(Q3)
= I
E(Q4)
= 2mA
V
CB
= 3V, I
E(Q3)
= I
E(Q4)
= 2mA
V
CB
= 3V, I
E(Q3)
= I
E(Q4)
= 2mA
-
0.45
5
mV
μ
A
μ
A
-
Input Offset Current (Figure 9)
-
0.3
2
Input Bias Current (Figure 5)
-
10
24
Quiescent Operating Current Ratio
(Figure 5)
-
0.98 to
1.02
-
Temperature Coefficient Magnitude of
Input Offset Voltage (Figure 7)
V
CB
= 3V, I
E(Q3)
= I
E(Q4)
= 2mA
-
1.1
-
μ
V/
o
C
-----------------
-----------------
or
-----------------
CA3054
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CA3054_05 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Dual Independent Differential Amp for Low Power Applications from DC to 120MHz
CA3054M 制造商:Harris Corporation 功能描述:
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CA3054MZ 功能描述:差分放大器 W/ANNEAL OPAMP 2X DIFF BALANCED 14 COM RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 Channel 帶寬:2.4 GHz 可用增益調(diào)整:6 dB to 26 dB 輸入補(bǔ)償電壓: 共模抑制比（最小值）:- 40 dB 工作電源電壓:4.75 V to 5.25 V 電源電流:100 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:WQFN-24 封裝:Reel
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