參數(shù)資料
型號: C8254
廠商: Electronic Theatre Controls, Inc.
元件分類: 通用總線功能
英文描述: PROGRAMMABLE TIMER /COUNTER MEGAFUNCTION
中文描述: 可編程定時/計數(shù)器宏功能
文件頁數(shù): 3/6頁
文件大?。?/td> 290K
代理商: C8254
CAST C8254 Megafunction Datasheet
CAST, Inc.
Page 3
Functional Description
This section provides a short description of each element of the Block Diagram (Figure 1).
Data Bus Buffer
8-bit input and output data bus buffer is used to interface the C8254 to the system bus.
Read/Write Logic
The Read/Write Logic accepts inputs from the system bus and generates control signals for the other
functional blocks of the C8254. ADDR[1:0}select one of the three counters or the control word register to be
read from or written into. A “l(fā)ow” on RDN tells the C8254 that the CPU is reading one of the counters. A “l(fā)ow”
on the WRN input tells the C8254 that the CPU is writing either a Control Word or an initial count. Both RDN
and WRN are qualified by CSN. RDN and WRN are ignored unless the C8254 has been selected by holding CSN
“l(fā)ow”.
Control Word Register
The Control Word Register is selected by the Read/Write Logic when ADDR[1:0] = 11. During writing, the
data is stored in the Control Word Register and it is interpreted as a Control Word used to define the
operation of the Counters.
Control Word Format
D7
D6
SC1
SC0
D5
RW1
D4
RW0
D3
M2
D2
M1
D1
M0
D0
BCD
SC1 SC0
0
0
0
1
1
0
1
1
Select Counter 0
Select Counter 1
Select Counter 2
Read-Back Command
RW1 RW0
0
0
0
1
1
0
1
1
Counter Latch Command
Read/Write LSB only
Read/Write MSB only
Read/Write LSB first, then MSB
M2 M1 M0
0
0
0
0
X
1
X
1
1
0
1
0
0
1
0
1
0
1
Mode 0
Mode 1
Mode 2
Mode 3
Mode 4
Mode 5
BCD
0
1
Binary Counter 16-bits
BCD Counter (4 Decades)
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