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參數(shù)資料
| 型號(hào)： | C8051F530A-TB |
| 廠商： | Silicon Laboratories Inc |
| 文件頁(yè)數(shù)： | 45/220頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | BOARD TARGET/PROTO W/C8051F530A |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | MCU |
| 適用于相關(guān)產(chǎn)品： | C8051F530A |
| 所含物品： | 板 |
| 產(chǎn)品目錄頁(yè)面： | 626 (CN2011-ZH PDF) |
| 相關(guān)產(chǎn)品： | 336-1486-5-ND - IC 8051 MCU 8K FLASH 20TSSOP 336-1485-5-ND - IC 8051 MCU 8K FLASH 20QFN |
| 其它名稱： | 336-1489 |
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Rev. 1.4
139
C8051F52x/F53x
14.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crys-
tal/resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 14.1. A
10 M
resistor also must be wired across the XTAL1 and XTAL2 pins for the crystal/resonator configura-
tion. In RC, capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 pin as
shown in Option 2, 3, or 4 of Figure 14.1. The type of external oscillator must be selected in the OSCXCN
register,
and
the
frequency
control
bits
(XFCN)
must
be
selected
appropriately
(see
Important Note on External Oscillator Usage: Port pins must be configured when using the external
oscillator circuit. When the external oscillator drive circuit is enabled in crystal/resonator mode, Port pins
P0.7 and P1.0 ('F53x/'F53xA) or P0.2 and P0.3 ('F52x/'F52xA) are used as XTAL1 and XTAL2 respec-
tively. When the external oscillator drive circuit is enabled in capacitor, RC, or CMOS clock mode, Port pin
P1.0 ('F53x/'F53xA) or P0.3 ('F52x/'F52xA) is used as XTAL2. The Port I/O Crossbar should be configured
to skip the Port pins used by the oscillator circuit; see Section “13.1. Priority Crossbar Decoder” on
page 122 for Crossbar configuration. Additionally, when using the external oscillator circuit in crystal/reso-
nator, capacitor, or RC mode, the associated Port pins should be configured as analog inputs. In CMOS
clock mode, the associated pin should be configured as a digital input. See Section “13.2. Port I/O Initial-
ization” on page 126 for details on Port input mode selection.
14.2.1. Clocking Timers Directly Through the External Oscillator
The external oscillator source divided by eight is a clock option for the timers (Section “18. Timers” on
page 182) and the Programmable Counter Array (PCA) (Section “19. Programmable Counter Array
(PCA0)” on page 195). When the external oscillator is used to clock these peripherals, but is not used as
the system clock, the external oscillator frequency must be less than or equal to the system clock fre-
quency. In this configuration, the clock supplied to the peripheral (external oscillator / 8) is synchronized
with the system clock; the jitter associated with this synchronization is limited to ±0.5 system clock cycles.
14.2.2. External Crystal Example
If a crystal or ceramic resonator is used as an external oscillator source for the MCU, the circuit should be
configured as shown in Figure 14.1, Option 1. The External Oscillator Frequency Control value (XFCN)
should be chosen from the Crystal column of the table in SFR Definition 14.4. For example, a 12 MHz crys-
tal requires an XFCN setting of 111b.
When the crystal oscillator is first enabled, the oscillator amplitude detection circuit requires a settling time
to achieve proper bias. Introducing a delay of 1 ms between enabling the oscillator and checking the
XTLVLD bit will prevent a premature switch to the external oscillator as the system clock. Switching to the
external oscillator before the crystal oscillator has stabilized can result in unpredictable behavior. The rec-
ommended procedure is:
1. Configure XTAL1 and XTAL2 pins by writing 1 to the port latch.
2. Configure XTAL1 and XTAL2 as analog inputs.
3. Enable the external oscillator.
4. Wait at least 1 ms.
5. Poll for XTLVLD => 1.
6. Switch the system clock to the external oscillator.
Note:
Tuning-fork crystals may require additional settling time before XTLVLD returns a valid result.
The capacitors shown in the external crystal configuration provide the load capacitance required by the
crystal for correct oscillation. These capacitors are "in series" as seen by the crystal and "in parallel" with
the stray capacitance of the XTAL1 and XTAL2 pins.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C8051F530-C-AT | 制造商:Silicon Laboratories Inc 功能描述: |
| C8051F530-C-ATR | 制造商:Silicon Laboratories Inc 功能描述: |
| C8051F530-C-IM | 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 8 KB, 256, SPI, UART, LIN 2.1, QFN20 - Rail/Tube 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 8KB FLASH 20DFN |
| C8051F530-C-IMR | 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 8 KB, 256, SPI, UART, LIN 2.1, QFN20 - Tape and Reel 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 8KB FLASH 20DFN |
| C8051F530-C-IT | 制造商:Silicon Laboratories Inc 功能描述:25 MIPS, 8 KB, 256, SPI, UART, LIN 2.1, TSSOP20 - Rail/Tube 制造商:Silicon Laboratories Inc 功能描述:IC MCU 8051 8KB FLASH 20TSSOP |
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