
C8051F040/1/2/3/4/5/6/7
Rev. 1.5
315
SFR Definition 24.4. PCA0L: PCA0 Counter/Timer Low Byte
SFR Definition 24.5. PCA0H: PCA0 Counter/Timer High Byte
Bits 7-0: PCA0L: PCA0 Counter/Timer Low Byte.
The PCA0L register holds the low byte (LSB) of the 16-bit PCA0 Counter/Timer.
R/WR/WR/WR/WR/WR/WR/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
SFR Page:
0xF9
0
Bits 7-0: PCA0H: PCA0 Counter/Timer High Byte.
The PCA0H register holds the high byte (MSB) of the 16-bit PCA0 Counter/Timer.
R/WR/WR/WR/WR/WR/WR/W
R/W
Reset Value
00000000
Bit7
Bit6
Bit5
Bit4
Bit3
Bit2
Bit1
Bit0
SFR Address:
SFR Page:
0xFA
0