參數(shù)資料
型號: C8051F007R
廠商: Silicon Laboratories Inc
文件頁數(shù): 134/171頁
文件大?。?/td> 0K
描述: IC 8051 MCU 32K FLASH 32LQFP
標(biāo)準(zhǔn)包裝: 1
系列: C8051F00x
核心處理器: 8051
芯體尺寸: 8-位
速度: 25MHz
連通性: SMBus(2 線/I²C),SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,溫度傳感器,WDT
輸入/輸出數(shù): 8
程序存儲器容量: 32KB(32K x 8)
程序存儲器類型: 閃存
RAM 容量: 2.25K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x12b; D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 32-LQFP
包裝: 剪切帶 (CT)
其它名稱: 336-1041-1
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
Table 10.1. CIP-51 Instruction Set Summary
Mnemonic
Description
Bytes
Clock
Cycles
ARITHMETIC OPERATIONS
ADD A,Rn
Add register to A
1
ADD A,direct
Add direct byte to A
2
ADD A,@Ri
Add indirect RAM to A
1
2
ADD A,#data
Add immediate to A
2
ADDC A,Rn
Add register to A with carry
1
ADDC A,direct
Add direct byte to A with carry
2
ADDC A,@Ri
Add indirect RAM to A with carry
1
2
ADDC A,#data
Add immediate to A with carry
2
SUBB A,Rn
Subtract register from A with borrow
1
SUBB A,direct
Subtract direct byte from A with borrow
2
SUBB A,@Ri
Subtract indirect RAM from A with borrow
1
2
SUBB A,#data
Subtract immediate from A with borrow
2
INC A
Increment A
1
INC Rn
Increment register
1
INC direct
Increment direct byte
2
INC @Ri
Increment indirect RAM
1
2
DEC A
Decrement A
1
DEC Rn
Decrement register
1
DEC direct
Decrement direct byte
2
DEC @Ri
Decrement indirect RAM
1
2
INC DPTR
Increment Data Pointer
1
MUL AB
Multiply A and B
1
4
DIV AB
Divide A by B
1
8
DA A
Decimal Adjust A
1
LOGICAL OPERATIONS
ANL A,Rn
AND Register to A
1
ANL A,direct
AND direct byte to A
2
ANL A,@Ri
AND indirect RAM to A
1
2
ANL A,#data
AND immediate to A
2
ANL direct,A
AND A to direct byte
2
ANL direct,#data
AND immediate to direct byte
3
ORL A,Rn
OR Register to A
1
ORL A,direct
OR direct byte to A
2
ORL A,@Ri
OR indirect RAM to A
1
2
ORL A,#data
OR immediate to A
2
ORL direct,A
OR A to direct byte
2
ORL direct,#data
OR immediate to direct byte
3
XRL A,Rn
Exclusive-OR Register to A
1
XRL A,direct
Exclusive-OR direct byte to A
2
XRL A,@Ri
Exclusive-OR indirect RAM to A
1
2
XRL A,#data
Exclusive-OR immediate to A
2
XRL direct,A
Exclusive-OR A to direct byte
2
XRL direct,#data
Exclusive-OR immediate to direct byte
3
CLR A
Clear A
1
CPL A
Complement A
1
RL A
Rotate A left
1
RLC A
Rotate A left through carry
1
RR A
Rotate A right
1
65
Rev. 1.7
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