參數(shù)資料
型號: C8051F005-TB
廠商: Silicon Laboratories Inc
文件頁數(shù): 166/171頁
文件大?。?/td> 0K
描述: BOARD PROTOTYPING W/C8051F005
標(biāo)準(zhǔn)包裝: 1
類型: MCU
適用于相關(guān)產(chǎn)品: C8051F005
所含物品:
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
13.1.
Power-on Reset
The C8051F000 family incorporates a power supply monitor that holds the MCU in the reset state until VDD rises
above the VRST level during power-up. (See Figure 13.2 for timing diagram, and refer to Table 13.1 for the
Electrical Characteristics of the power supply monitor circuit.) The /RST pin is asserted (low) until the end of the
100ms VDD Monitor timeout in order to allow the VDD supply to become stable.
On exit from a power-on reset, the PORSF flag (RSTSRC.1) is set by hardware to logic 1. All of the other reset
flags in the RSTSRC Register are indeterminate. PORSF is cleared by a reset from any other source. Since all
resets cause program execution to begin at the same location (0x0000), software can read the PORSF flag to
determine if a power-up was the cause of reset. The content of internal data memory should be assumed to be
undefined after a power-on reset.
13.2.
Software Forced Reset
Writing a 1 to the PORSF bit forces a Power-On Reset as described in Section 13.1.
Figure 13.2. VDD Monitor Timing Diagram
/RST
t
vol
ts
1.0
2.0
Logic HIGH
Logic LOW
100ms
V
D
2.70
2.40
V
RST
13.3.
Power-fail Reset
When a power-down transition or power irregularity causes VDD to drop below VRST, the power supply monitor
will drive the /RST pin low and return the CIP-51 to the reset state (see Figure 13.2). When VDD returns to a level
above VRST, the CIP-51 will leave the reset state in the same manner as that for the power-on reset. Note that even
though internal data memory contents are not altered by the power-fail reset, it is impossible to determine if VDD
dropped below the level required for data retention. If the PORSF flag is set, the data may no longer be valid.
Rev. 1.7
94
相關(guān)PDF資料
PDF描述
SK101M250ST CAP ALUM 100UF 250V 20% RADIAL
SLPX472M063E3P3 CAP ALUM 4700UF 63V 20% SNAP
SDR-R SCOTCH CODE REFILL R
C8051F206-TB BOARD PROTOTYPING W/C8051F206
0210490992 CABLE JUMPER 1.25MM .102M 29POS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C8051F005-TB-K 功能描述:BOARD PROTOTYPING W/C8051F005 制造商:silicon labs 系列:- 零件狀態(tài):在售 板類型:評估平臺 類型:MCU 8-位 核心處理器:8051 操作系統(tǒng):- 平臺:- 配套使用產(chǎn)品/相關(guān)產(chǎn)品:C8051F0xx 安裝類型:固定 內(nèi)容:板 標(biāo)準(zhǔn)包裝:1
C8051F006 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F006-GQ 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F006-GQR 功能描述:8位微控制器 -MCU 32KB 12ADC 48Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F006R 功能描述:8位微控制器 -MCU C +-12Bit 48Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT