參數(shù)資料
型號: C8051F001
廠商: Cygnal Technologies
英文描述: 20 MIPS,32k Flash,256 Ram,12bit ADC,48 Pin MCU(20 MIPS,32k 閃速存儲器,256 Ram,12位 ADC,48 腳 MCU)
中文描述: 20 MIPS的,32K閃存,256羊,12位ADC,48引腳微控制器(20 MIPS的,32K的閃速存儲器,256,羊,12位ADC和48腳微控制器)
文件頁數(shù): 140/170頁
文件大?。?/td> 1294K
代理商: C8051F001
Page 140
CYGNAL Integrated Products, Inc.
2001
4.2001; Rev. 1.3
C8051F000/1/2/5/6/7
C8051F010/1/2/5/6/7
PRELIMINARY
Figure 19.4. TCON: Timer Control Register
R/W
TF1
Bit7
R/W
TR1
Bit6
R/W
TF0
Bit5
R/W
TR0
Bit4
R/W
IE1
Bit3
R/W
IT1
Bit2
R/W
IE0
Bit1
R/W
IT0
Bit0
Reset Value
00000000
SFR Address:
0x88
Bit7:
TF1: Timer 1 Overflow Flag.
Set by hardware when Timer 1 overflows. This flag can be cleared by software but is
automatically cleared when the CPU vectors to the Timer 1 interrupt service routine.
0: No Timer 1 overflow detected.
1: Timer 1 has overflowed.
TR1: Timer 1 Run Control.
0: Timer 1 disabled.
1: Timer 1 enabled.
Bit6:
Bit5:
TF0: Timer 0 Overflow Flag.
Set by hardware when Timer 0 overflows. This flag can be cleared by software but is
automatically cleared when the CPU vectors to the Timer 0 interrupt service routine.
0: No Timer 0 overflow detected.
1: Timer 0 has overflowed.
TR0: Timer 0 Run Control.
0: Timer 0 disabled.
1: Timer 0 enabled.
Bit4:
Bit3:
IE1: External Interrupt 1.
This flag is set by hardware when an edge/level of type defined by IT1 is detected. It can
be cleared by software but is automatically cleared when the CPU vectors to the External
Interrupt 1 service routine if IT1 = 1. This flag is the inverse of the /INT1 input signal’s
logic level when IT1 = 0.
Bit2:
IT1: Interrupt 1 Type Select.
This bit selects whether the configured /INT1 signal will detect falling edge or active-low
level-sensitive interrupts.
0: /INT1 is level triggered.
1: /INT1 is edge triggered.
Bit1:
IE0: External Interrupt 0.
This flag is set by hardware when an edge/level of type defined by IT0 is detected. It can
be cleared by software but is automatically cleared when the CPU vectors to the External
Interrupt 0 service routine if IT0 = 1. This flag is the inverse of the /INT0 input signal’s
logic level when IT0 = 0.
Bit0:
IT0: Interrupt 0 Type Select.
This bit selects whether the configured /INT0 signal will detect falling edge or active-low
level-sensitive interrupts.
0: /INT0 is level triggered.
1: /INT0 is edge triggered.
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參數(shù)描述
C8051F001-GQ 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F001-GQR 功能描述:8位微控制器 -MCU 32KB 12ADC 48Pin MCU Tape and Reel RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F001R 功能描述:8位微控制器 -MCU C 12Bit 48Pin RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F002 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT
C8051F002-GQ 功能描述:8位微控制器 -MCU 32KB 12ADC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT