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    參數(shù)資料
    型號: C522G102D1C0G5CR
    廠商: KEMET Corporation
    英文描述: CERAMIC MOLDED/AXIAL & RADIAL - MIL-PRF-20
    中文描述: 陶瓷成型/軸流
    文件頁數(shù): 5/23頁
    文件大?。?/td> 1200K
    代理商: C522G102D1C0G5CR
    KEMET Electronics Corporation P.O. Box 5928 Greenville, SC 29606 (864) 963-6300 www.kemet.com
    3
    and dissipa-
    e. The max-
    e
    defines a “box”
    es and
    Within this
    upon the spe-
    KEMET capaci-
    temperature.
    -
    Effect of Temperature:
    Both capacitance
    tion factor are affected by variations in temperatur
    imum capacitance change with temperature is defined by th
    temperature characteristic. However, this only
    bounded by the upper and lower operating temperatur
    the minimum and maximum capacitance values.
    “box”, the variation with temperature depends
    cific dielectric formulation. Typical curves for
    tors are shown in Figures 3 and 4. These figures also include
    the typical change in dissipation factor for KEMET capacitors.
    Insulation resistance decreases with
    Typically, the insulation resistance at maximum rated temper
    ature is 10% of the 25oC value.
    EFFECT OF APPLIED VOLTAGE
    1
    2
    3
    4
    +10
    +5
    0
    -5
    -10
    0.1
    1
    10
    100
    AC or DC Volts Applied
    Typical Effects of 1000 Hz AC and DC Voltage Level on
    Capacitance and Dissipation Factor - X7R
    Note: C0G Dielectric capacitance and dissipation factor are
    stable with voltage.
    Figure 6.
    %
    %
    DC
    AC
    AC
    DC
    Effect of Voltage:
    Class I ceramic capacitors are not
    affected by variations in applied AC or DC voltages. For Class
    II and III ceramic capacitors, variations in voltage affect only
    the capacitance and dissipation factor. The application of DC
    voltage higher than 5 vdc reduces both the capacitance and
    dissipation factor. The application of AC voltages up to 10-20
    Vac tends to increase both capacitance and dissipation factor
    At higher AC voltages, both capacitance and dissipation factor
    begin to decrease.
    Typical curves showing the effect of applied AC and DC
    voltage are shown in Figure 6 for KEMET X7R capacitors.
    APPLICATION NOTES FOR MULTILAYER CERAMIC CAPACITORS
    Effect of Frequency:
    Frequency affects both capaci-
    tance and dissipation factor. Typical curves for KEMET multi-
    layer ceramic capacitors are shown in Figures 8 and 9.
    T
    he variation of impedance with frequency is an impor-
    tant consideration in the application of multilayer ceramic
    capacitors. Total impedance of the capacitor is the vector of the
    capacitive reactance, the inductive reactance, and the ESR, as
    illustrated in Figure 2. As frequency increases, the capacitive
    reactance decreases. However, the series inductance (L)
    shown in Figure 1 produces inductive reactance, which
    increases with frequency. At some frequency, the impedance
    ceases to be capacitive and becomes inductive. This point, at
    the bottom of the V-shaped impedance versus frequency
    curves, is the self-resonant frequency. At the self-resonant fre-
    quency, the reactance is zero, and the impedance consists of
    the ESR only.
    Typical impedance versus frequency curves for KEMET
    multilayer ceramic capacitors are shown in Figures 10 and 11.
    These curves apply to KEMET capacitors in chip form, without
    leads. Lead configuration and lead length have a significant
    impact on the series inductance. The lead inductance is
    approximately 10nH/inch, which is large compared to the
    inductance of the chip. The effect of this additional inductance
    is a decrease in the self-resonant frequency, and an increase
    in impedance in the inductive region above the self-resonant
    frequency.
    Effect of Time:
    The capacitance of Class II and III
    dielectrics change with time as well as with temperature, volt-
    age and frequency. This change with time is known as “aging.”
    It is caused by gradual realignment of the crystalline structure
    of the ceramic dielectric material as it is cooled below its Curie
    temperature, which produces a loss of capacitance with time.
    The aging process is predictable and follows a logarithmic
    decay. Typical aging rates for C0G and X7R dielectrics are as
    follows:
    C0G
    X7R
    None
    2.0% per decade of time
    Typical aging curves for X7R dielectrics is shown in
    Figure 12.
    The aging process is reversible. If the capacitor is heat-
    ed to a temperature above its Curie point for some period of
    time, de-aging will occur and the capacitor will regain the
    capacitance lost during the aging process. The amount of de-
    aging depends on both the elevated temperature and the
    length of time at that temperature. Exposure to 150oC for one-
    half hour or 125oC for two hours is usually sufficient to return
    the capacitor to its initial value.
    Because the capacitance changes rapidly immediately
    after de-aging, capacitance measurements are usually delayed
    for at least 10 hours after the de-aging process, which is often
    referred to as the “l(fā)ast heat.” In addition, manufacturers utilize
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