- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄379718 > C4532X5R1E156M (National Semiconductor Corporation) N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages PDF資料下載
參數(shù)資料
| 型號(hào)： | C4532X5R1E156M |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages |
| 中文描述： | N溝道場效應(yīng)管同步降壓穩(wěn)壓控制器輸出電壓低 |
| 文件頁數(shù)： | 2/22頁 |
| 文件大?。?/td> | 602K |
| 代理商： | C4532X5R1E156M |
Connection Diagram
20049411
14-Lead Plastic TSSOP
θ
= 155C/W
NS Package Number MTC14
Pin Description
BOOT (Pin 1)
- Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold
above the regulator input voltage to properly turn on the
high-side N-FET.
LG (Pin 2)
- Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG to avoid shoot-through
problems.
PGND (Pins 3, 13)
- Ground for FET drive circuitry. It should
be connected to system ground.
SGND (Pin 4)
- Ground for signal level circuitry. It should be
connected to system ground.
V
CC
(Pin 5)
- Supply rail for the controller.
PWGD (Pin 6)
- Power Good. This is an open drain output.
The pin is pulled low when the chip is in UVP, OVP, or UVLO
mode. During normal operation, this pin is connected to V
CC
or other voltage source through a pull-up resistor.
ISEN (Pin 7)
- Current limit threshold setting. This sources a
fixed 50μA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side
FET.
EAO (Pin 8)
- Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SS (Pin 9)
- Soft start pin. A capacitor connected between
this pin and ground sets the speed at which the output
voltage ramps up. Larger capacitor value results in slower
output voltage ramp but also lower inrush current.
FB (Pin 10)
- This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compen-
sating the control loop.
FREQ (Pin 11)
- The switching frequency is set by connect-
ing a resistor between this pin and ground.
SD (Pin 12)
- IC Logic Shutdown. When this pin is pulled low
the chip turns off the high side switch and turns on the low
side switch. While this pin is low, the IC will not start up. An
internal 20μA pull-up connects this pin to V
CC
.
HG (Pin 14)
- Gate drive for the high-side N-channel MOS-
FET. This signal is interlocked with LG to avoid shoot-
through problems.
L
www.national.com
2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| C4550 | Previous Vectron Model Numbers |
| C4674 | Signal processing circuit for 2-D PSD |
| C4757 | Signal processing circuit for 2-D PSD |
| C4758 | Signal processing circuit for 2-D PSD |
| C4675 | 16 x 16 element photodiode array detector |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| C4532X5R1E156M/2.50 | 功能描述:多層陶瓷電容器MLCC - SMD/SMT RoHS:否 制造商:Johanson Dielectrics 電容:2.2 uF 容差:10 % 電壓額定值:10 V 溫度系數(shù)/代碼: 外殼代碼 - in:0603 外殼代碼 - mm:1608 工作溫度范圍:- 55 C to + 85 C 產(chǎn)品: 封裝:Reel |
| C4532X5R1E156M/2.80 | 功能描述:多層陶瓷電容器MLCC - SMD/SMT 15uF 20% 25Volts RoHS:否 制造商:American Technical Ceramics (ATC) 電容:10 pF 容差:1 % 電壓額定值:250 V 溫度系數(shù)/代碼:C0G (NP0) 外殼代碼 - in:0505 外殼代碼 - mm:1414 工作溫度范圍:- 55 C to + 125 C 產(chǎn)品:Low ESR MLCCs 封裝:Reel |
| C4532X5R1E156M/3 | 制造商:TDK CORPORATION OF AMERICA 功能描述:MLCC |
| C4532X5R1E156M250KA | 制造商:TDK 功能描述:CAP CER 15UF 25V 20% X5R 1812 |
| C4532X5R1E156M280KA | 制造商:TDK 功能描述:CAP 15UF 25VDC X5R 20% SMD 1812 - Tape and Reel 制造商:TDK 功能描述:CAP CER 15UF 25V 20% X5R 1812 制造商:TDK 功能描述:CAPACITOR CERAMIC, 15UF, 25V, X5R, 20%, 1812; Capacitance:15F; Capacitance Tolerance: 20%; Dielectric Characteristic:X5R; Voltage Rating:25V; Capacitor Case Style:1812 [4532 Metric]; Capacitor Terminals:SMD; Capacitor Mounting:SMD ;RoHS Compliant: Yes 制造商:TDK CORPORATION OF AMERICA 功能描述:Case:C4532, T.C:X5R, Voltage:1E, Cap Value:156, Tol:M, Thickness:2.8, E series: 6 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。