參數(shù)資料
型號(hào)： C2012X5R1J106M
廠(chǎng)商： National Semiconductor Corporation
英文描述： N-Channel FET Synchronous Buck Regulator Controller for Low Output Voltages
中文描述： N溝道場(chǎng)效應(yīng)管同步降壓穩(wěn)壓控制器輸出電壓低
文件頁(yè)數(shù)： 2/22頁(yè)
文件大?。?/td> 602K
代理商： C2012X5R1J106M
Connection Diagram
20049411
14-Lead Plastic TSSOP
θ
= 155C/W
NS Package Number MTC14
Pin Description
BOOT (Pin 1)
- Supply rail for the N-channel MOSFET gate
drive. The voltage should be at least one gate threshold
above the regulator input voltage to properly turn on the
high-side N-FET.
LG (Pin 2)
- Gate drive for the low-side N-channel MOSFET.
This signal is interlocked with HG to avoid shoot-through
problems.
PGND (Pins 3, 13)
- Ground for FET drive circuitry. It should
be connected to system ground.
SGND (Pin 4)
- Ground for signal level circuitry. It should be
connected to system ground.
V
CC
(Pin 5)
- Supply rail for the controller.
PWGD (Pin 6)
- Power Good. This is an open drain output.
The pin is pulled low when the chip is in UVP, OVP, or UVLO
mode. During normal operation, this pin is connected to V
CC
or other voltage source through a pull-up resistor.
ISEN (Pin 7)
- Current limit threshold setting. This sources a
fixed 50μA current. A resistor of appropriate value should be
connected between this pin and the drain of the low-side
FET.
EAO (Pin 8)
- Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SS (Pin 9)
- Soft start pin. A capacitor connected between
this pin and ground sets the speed at which the output
voltage ramps up. Larger capacitor value results in slower
output voltage ramp but also lower inrush current.
FB (Pin 10)
- This is the inverting input of the error amplifier,
which is used for sensing the output voltage and compen-
sating the control loop.
FREQ (Pin 11)
- The switching frequency is set by connect-
ing a resistor between this pin and ground.
SD (Pin 12)
- IC Logic Shutdown. When this pin is pulled low
the chip turns off the high side switch and turns on the low
side switch. While this pin is low, the IC will not start up. An
internal 20μA pull-up connects this pin to V
CC
.
HG (Pin 14)
- Gate drive for the high-side N-channel MOS-
FET. This signal is interlocked with LG to avoid shoot-
through problems.
L
www.national.com
2
相關(guān)PDF資料
PDF描述
C228 SILICON CONTROLLED RECTIFIER REVERSE BLOCKING TRIODE THYRISTOR
C228A SILICON CONTROLLED RECTIFIER REVERSE BLOCKING TRIODE THYRISTOR
C228A3 SILICON CONTROLLED RECTIFIER REVERSE BLOCKING TRIODE THYRISTOR
C228B SILICON CONTROLLED RECTIFIER REVERSE BLOCKING TRIODE THYRISTOR
C228B3 SILICON CONTROLLED RECTIFIER REVERSE BLOCKING TRIODE THYRISTOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
C2012X5R1V010BTXXXX 制造商:TDK 制造商全稱(chēng):TDK Electronics 功能描述:General Application
C2012X5R1V010WTXXXX 制造商:TDK 制造商全稱(chēng):TDK Electronics 功能描述:General Application
C2012X5R1V0R5BTXXXX 制造商:TDK 制造商全稱(chēng):TDK Electronics 功能描述:General Application
C2012X5R1V0R5WTXXXX 制造商:TDK 制造商全稱(chēng):TDK Electronics 功能描述:General Application
C2012X5R1V102BTXXXX 制造商:TDK 制造商全稱(chēng):TDK Electronics 功能描述:General Application
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠(chǎng)商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*