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參數(shù)資料
| 型號(hào)： | BW1251X |
| 英文描述： | Rad hard low voltage CMOS 16-bit bus buffer transceiver (3-state) with 3.6 V tolerant inputs and outputs |
| 中文描述： | BW1251X 12位500KSPS ADC的BW1251X |數(shù)據(jù)資料 |
| 文件頁數(shù)： | 9/13頁 |
| 文件大小： | 140K |
| 代理商： | BW1251X |
SEC ASIC
BW1251X
12bit 500KSPS ADC
MIXED
PACKAGE PIN DESCRIPTION
NOTES
1. I/O TYPE PP and PG denote PAD Power and PAD Ground respectively.
No.
NAME
I/O
TYPE
PIN DESCRIPTION
CONFIGURATION
1,2
VREF
AI
Reference Voltage (3.3V)
3,4
AGND
AI
Analog Ground (0.0V)
6, 7
VDDA
AP
Analog Power (3.3V)
8
VBBA
AG
Analog Sub Bias
9, 10
VSSA
AG
Analog Ground
11
AINT
AI
Analog Input
17
STBY
DI
VDD=Power saving (Standby),
GND=Normal
18
VDDR
PP
PAD Power (3.3V)
19
VSSR
PG
PAD Ground
20
CKIN
DI
Clock Input (f
CKIN
= 2.5MHz)
23
RP
AO
Test Pin1
24
RN
AO
Test Pin2
27
DO[0]
DO
Digital Output (LSB)
28~37
DO[1:10]
DO
Digital Output
38
DO[11]
DO
Digital Output (MSB)
41
EOC
DO
End of Conversion Signal
42
STC
DI
Start of Conversion Signal
45, 46
VSSD
DG
Digital GND
47, 48
VDDD
DP
Digital Power (3.3V)
VREF
VBBA
NC
NC
RP
RN
BW1251X
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VREF
AGND
NC
VDDA
VDDA
VSSA
VSSA
AINT
NC
NC
NC
NC
NC
STBY
VDDR
VSSR
CKIN
VDDD
VDDD
VSSD
VSSD
NC
STC
EOC
NC
NC
DO[11]
DO[10]
DO[9]
DO[8]
DO[7]
DO[6]
DO[5]
DO[4]
DO[3]
DO[2]
DO[1]
DO[0]
NC
NC
AGND
NC
9/12
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