參數(shù)資料
型號(hào): BUK565-60H
廠商: NXP SEMICONDUCTORS
元件分類(lèi): JFETs
英文描述: PowerMOS transistor Logic level FET
中文描述: 41 A, 60 V, 0.038 ohm, N-CHANNEL, Si, POWER, MOSFET
文件頁(yè)數(shù): 1/8頁(yè)
文件大小: 72K
代理商: BUK565-60H
Philips Semiconductors
Product specification
PowerMOS transistor
Logic level FET
BUK565-60H
GENERAL DESCRIPTION
QUICK REFERENCE DATA
N-channel enhancement mode logic
level field-effect power transistor in
a plastic envelope suitable for
surface mount applications.
The device is intended for use in
automotive and general purpose
switching applications.
SYMBOL
PARAMETER
MAX.
UNIT
V
DS
I
D
P
tot
T
j
R
DS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance;
60
41
125
175
38
V
A
W
C
m
V
GS
= 5 V
PINNING - SOT404
PIN CONFIGURATION
SYMBOL
PIN
DESCRIPTION
1
gate
2
drain
3
source
mb
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
V
DS
V
DGR
±
V
GS
±
V
GSM
PARAMETER
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Non-repetitive gate-source
voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
-
R
GS
= 20 k
-
t
p
50
μ
s
MIN.
-
-
-
-
MAX.
60
60
15
20
UNIT
V
V
V
V
I
D
I
D
I
DM
P
tot
T
stg
T
j
T
mb
= 25 C
T
mb
= 100 C
T
mb
= 25 C
T
mb
= 25 C
-
-
-
-
-
-
41
29
164
125
175
175
A
A
A
W
C
C
- 55
-
THERMAL RESISTANCES
SYMBOL
R
th j-mb
PARAMETER
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
CONDITIONS
TYP.
-
MAX.
1.2
UNIT
K/W
R
th j-a
minimum footprint, FR4 board
(see Fig. 18)
50
-
K/W
d
g
s
1
3
mb
2
June 1995
1
Rev 1.000
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