參數(shù)資料
型號(hào): BU9881F
英文描述: I2C Serial EEPROM
中文描述: I2C串行EEPROM的
文件頁數(shù): 6/12頁
文件大?。?/td> 142K
代理商: BU9881F
6
Standard ICs
BU9881 / BU9881F
V
CC
SCL
VCLK
TVPU
1
2
9
10
D7
D7
D0
bit
NULL
TVAA
HIGH-Z
SDA
MODE Don't Care
0h address
Last address
Fig. 6
2) I
2
C bus mode
1. Start condition (start bit recognition)
Before executing the various commands, if SDA is HIGH, a start condition (start bit) must be in effect such that
SDA changes from HIGH to LOW.
This IC constantly detects whether or not the start condition (start bit) is fulfilled for the SDA and SCL lines. If
this condition is not fulfilled, no commands will be executed. (Refer to the section on synchronized data input /
output timing.)
2. Stop condition (stop bit recognition)
When the various commands have been completed, a stop condition (stop bit) can be used to terminate the
commands by raising SDA from LOW to HIGH if SCL is HIGH. (Refer to the section on synchronized data input /
output timing.)
3. Precautions concerning the write command
The stop bit cannot be executed in the write mode, so data that has been transmitted cannot be written to the
memory.
4. Write protect
In the I
2
C bus mode, the VCLK pin can be used as a write protect control pin. When the VCLK pin is HIGH, the byte
write and page write commands function, but when the VCLK pin is LOW, these two writing commands are canceled.
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