參數(shù)資料
型號: BU4094BCFV-E2
廠商: Rohm Semiconductor
文件頁數(shù): 13/17頁
文件大?。?/td> 0K
描述: IC SHIFT REGISTER 8BIT 16SSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: 4000B
邏輯類型: 移位寄存器
輸出類型: 三態(tài)
元件數(shù): 1
每個元件的位元數(shù): 8
功能: 串行至并行
電源電壓: 3 V ~ 18 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-SSOPB
包裝: 帶卷 (TR)
Technical Note
BU4015B,BU4015BF,BU4021B,BU4021BF,
BU4094BC,BU4094BCF,BU4094BCFV,BU4538B,BU4028B
5/17
www.rohm.com
2009.06 - Rev.A
2009 ROHM Co., Ltd. All rights reserved.
●Electrical Characteristics(BU4094BC)
DC Characteristics (Unless otherwise noted VSS=0[V],Ta=25[℃])
Parameter
Symbol
Limits
Unit
Condition
Fig.No
Min
Typ
Max
VDD[V]
Input ‘H’ voltage
VIH
3.5
V
5
7.0
10
11.0
15
Input ‘L’ voltage
VIL
1.5
V
5
3.0
10
4.0
15
Input ‘H’ current
IIH
0.3
μA
15
VIH=15[V]
Input ‘L’ current
IIL
-0.3
μA
15
VIL=0[V]
Output ‘H’ voltage
VOH
4.95
V
5
IO=0[mA]
21
9.95
10
14.95
15
Output ‘L’ voltage
VOL
0.05
V
5
IO=0[mA]
22
0.05
10
0.05
15
Output ‘H’ current
IOH
-0.44
mA
5
VOH=4.6[V]
21
-1.1
5
VOH=9.5[V]
-3.0
15
VOH=13.5[V]
Output ‘L’ current
IOL
0.44
mA
5
VOL=0.4[V]
22
1.1
10
VOL=0.5[V]
3.0
15
VOL=1.5[V]
Static supply current
IDD
5
μA
5
VI=VDD or GND
10
20
15
Switching Characteristics (Unless otherwise noted
VSS=0[V],Ta=25[℃],CL=50[pF])
Parameter
Symbol
Limits
Unit
Condition
Fig.No
Min
Typ
Max
VDD[V]
Output rising time
tTLH
100
200
ns
5
50
100
10
40
80
15
Output falling time
tTHL
100
200
ns
5
50
100
10
40
80
15
Propagation delay time
CLOCK→QS
tPLH
tPHL
350
600
ns
5
23
125
250
10
95
190
15
Propagation delay time
CLOCK→Q’S
tPLH
tPHL
230
460
ns
5
24
110
220
10
75
150
15
Propagation delay time
CLOCK→QN
tPLH
tPHL
420
840
ns
5
25
195
390
10
135
270
15
Propagation delay time
STROBE→QN
tPLH
tPHL
290
580
ns
5
26
145
290
10
100
200
15
3state
Propagation delay time
Output Enable→QN
tPHZ
tPZH
140
280
ns
5
RL=1[k
]
27
75
150
10
55
110
15
3 state
Propagation delay time
Output Enable→QN
tPLZ
tPZL
140
280
ns
5
RL=1[k
]
28
75
150
10
55
110
15
Minimum set up time
DATA→CLOCK
tsu
20
125
ns
5
29
855
10
635
15
Minimum hold time
CLOCK →DATA
tH
10
40
ns
5
30
10
20
10
515
15
Minimum clock pulse
width
tW(CLK)
100
200
ns
5
31
50
100
10
40
80
15
Maximum clock
rising/falling time
tr(CL)
tf(CL)
NO Limit
μs
5
10
15
Maximum clock
frequency
f CL
1.25
2.5
MHz
2.5
5
3.0
12.5
Minimum
strobe pulse width
TwH
100
200
ns
40
80
35
70
Input capacitance
CIN
5
pF
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