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參數(shù)資料
| 型號(hào)： | BU1923F |
| 廠商： | Rohm CO.,LTD. |
| 英文描述： | RDS / RBDS decoder |
| 中文描述： | 鐵路發(fā)展策略/無線廣播數(shù)據(jù)解碼器 |
| 文件頁數(shù)： | 5/6頁 |
| 文件大?。?/td> | 83K |
| 代理商： | BU1923F |
832
Audio ICs
BU1923 / BU1923F
Output data timing
The clock (RCLK) frequency is 1187.5Hz. Depending on
the state of the internal PLL clock, the data (RDATA) is
replaced in synchronous with either the rising or falling
edge of the clock. To read the data, you may choose ei-
ther the rising or falling edge of the clock as the refer-
ence. The data is valid for 416.7
μ
s. after the reference
clock edge.
QUAL pin operation: Indicates the quality of the demodu-
lated data.
(1)
Good data: HI
(2)
Poor data: LO
Electrical characteristic curve
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| BU1924 | 制造商:ROHM 制造商全稱:Rohm 功能描述:RDS / RBDS decoder |
| BU1924F | 制造商:ROHM 制造商全稱:Rohm 功能描述:RDS / RBDS decoder |
| BU1924F-E2 | 制造商:ROHM Semiconductor 功能描述:DECODER for RBDS |
| BU19502KV-E2 | 制造商:ROHM Semiconductor 功能描述:SERIAL ATA-IDE BRIDGE ICS, T/R, FOR NINTENDO ONLY - Tape and Reel |
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