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參數(shù)資料
| 型號： | BU-6586NEW |
| 英文描述： | MIL-STD-1553 Components |PCI Mini-ACE? Mark3 |
| 中文描述： | 符合MIL - STD - 1553器件|迷你的PCI ACE論壇？ Mark3 |
| 文件頁數(shù)： | 5/60頁 |
| 文件大小： | 410K |
| 代理商： | BU-6586NEW |
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5
Data Device Corporation
www.ddc-web.com
BU-64743/64843/64863
C-03/03-300
The Mini-ACE Mark3 includes a 3.3 volt voltage source trans-
ceiver for improved line driving capability, with options for MIL-
STD-1760 and McAir compatibility.Mark3 versions with 64K x 17
RAM offer an additional transceiver power-down (SLEEPIN)
option to further reduce device power consumption. To provide
further flexibility, the Mini-ACE Mark3 may operate with a choice
of 10, 12, 16, or 20 MHz clock inputs.
One of the new salient features of the Mark3 is its Enhanced bus
controller architecture. The Enhanced BC's highly autonomous
message sequence control engine provides a means for offload-
ing the host processor for implementing multiframe message
scheduling, message retry schemes, data double buffering, and
asynchronous message insertion. For the purpose of performing
messaging to the host processor, the Enhanced BC mode
includes a General Purpose Queue, along with user-defined
interrupts.
A second major new feature of the Mark3 is the incorporation of
a fully autonomous built-in self-test. This test provides compre-
hensive testing of the internal protocol logic. A separate test ver-
ifies the operation of the internal RAM. Since the self-tests are
fully autonomous, they eliminate the need for the host to write
and read stimulus and response vectors.
The Mini-ACE Mark3 RT offers the same choices of single, dou-
ble, and circular buffering for individual subaddresses as the
ACE, Mini-ACE (Plus) and Enhanced Mini-ACE. New enhance-
ments to the RT architecture include a global circular buffering
option for multiple (or all) receive subaddresses, a 50% rollover
interrupt for circular buffers, an interrupt status queue for logging
up to 32 interrupt events, and an option to automatically initialize
to RT mode with the Busy bit set.The interrupt status queue and
50% rollover interrupt features are also included as improve-
ments to the Mark3's Monitor architecture.
To minimize board space and "glue" logic, the Mini-ACE Mark3
terminals provide the same wide choice of host interface config-
urations as the ACE, Mini-ACE (Plus) and Enhanced Mini-ACE.
This includes support of interfaces to 16-bit or 8-bit processors,
memory or port type interfaces, and multiplexed or non-multi-
plexed address/data buses. In addition, with respect to
ACE/Mini-ACE (Plus), the worst case processor wait time has
been significantly reduced. For example, assuming a 16 MHz
clock, this time has been reduced from 2.8 μs to 632 ns for read
accesses, and to 570 ns for write accesses.
The Mini-ACE Mark3 series terminals operate over the full mili-
tary temperature range of -55 to +125°C and are available
screened to MIL-PRF-38534C. The terminals are ideal for mili-
tary and industrial processor-to-1553 applications powered by
3.3 volts only.
(9)
For Enhanced BC mode, the typical value for intermessage gap
time is approximately 10 clock cycles longer than for the non-
enhanced BC mode. That is, an addition of 1.0 μs at 10 MHz, 833
ns at 12 MHz, 625 ns at 16 MHz, or 500 ns at 20 MHz.
(10) Software programmable (4 options). Includes RT-to-RT Timeout
(measured mid-parity of transmit Command Word to mid-sync of
transmitting RT Status Word).
(11) Measured from mid-parity crossing of Command Word to mid-sync
crossing of RT's Status Word.
(12) External 10 μF tantalum and 0.1 μF capacitors should be located as
close as possible to +3.3 Vdc input pins 10, 30, 51, and 69.
(13) MIL-STD-1760 requires a 20 Vp-p minimum output on the stub con-
nection.
(14) Current drain and power dissipation specs are preliminary and sub-
ject to change.
(15) Power dissipation specifications assume a transformer coupled
configuration with external dissipation (while transmitting) of:
0.14 watts for the active isolation transformer,
0.08 watts for the active bus coupling transformer,
0.45 watts for EACH of the two bus isolation resistors and
0.15 watts for EACH of the two bus termination resistors.
(16)
θ
JC
is measured to bottom of ceramic case.
TABLE 1 Notes: (Cont’d)
INTRODUCTION
The Mini-ACE Mark3 is the world's first MIL-STD-1553 terminal
powered entirely by 3.3 volts, thus eliminating the need for a
5 volt power supply. The BU-64743 RT only, and BU-
64843/64863 BC/RT/MT Mini-ACE Mark3 family of MIL-STD-
1553 terminals comprise a complete integrated interface
between a host processor and a MIL-STD-1553 bus. The Mini-
ACE Mark3 is available in a 0.88 square inch flat pack or gull
wing package with a "toe-to-toe" dimension of 1.13 inches max-
imum. The Mark3 is the industry's smallest ceramic gull-lead
1553 terminal, enabling its use in applications where PC board
space is at a premium. The Mark3's architecture is identical to
that of the Enhanced Mini-ACE, and most features are function-
ally and software compatible with the previous Mini-ACE (Plus)
and ACE generations.
The Mini-ACE Mark3 provides complete multiprotocol support of
MIL-STD-1553A/B/McAir and STANAG 3838. The Mark3 inte-
grates dual transceiver, protocol logic, and either 4K or 64K
words of internal RAM.The BU-64843 and BU-64863 BC/RT/MT
terminals include 64K words of internal RAM, with built-in parity
checking.
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