參數(shù)資料
型號: BU-65572V4-300
廠商: DATA DEVICE CORP
元件分類: 微控制器/微處理器
英文描述: 4 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, XMA
封裝: 6.3 INCH HEIGHT, VME/VXI FORMAT CARD
文件頁數(shù): 3/9頁
文件大小: 151K
代理商: BU-65572V4-300
3
Data Device Corporation
www.ddc-web.com
BU-65570V/65572V
F-04/05-0
TABLE 2. BU-65570V/65572V SPECIFICATIONS
PARAMETER
MIN
TYP
MAX
UNITS
ABSOLUTE MAXIMUM RATING
Supply Voltage
+5 V
RECEIVER
Threshold Voltage, Transformer
Coupled, Measured on Stub
TRANSMITTER
Differential Output Voltage
BU-65570V (See NOTE 5)
BU-65572V (See NOTES 5 and 6)
POWERSUPPLYREQUIREMENTS
PER 1553 BUS
Voltages/Tolerances
+5V
Current Drain @ +5.0V
Idle
50% Transmitter Duty Cycle
100% Transmitter Duty Cycle
(See NOTE 1)
1553 MESSAGE TIMING
RT Response Time
(See NOTE 2)
BC Intermessage Gap
(See NOTE 3)
BC/RT/MT Response Timeout
(See NOTE 4)
Transmitter Watchdog Timeout
MT Minimum gap for capture
-0.3
7.0
V
0.56
Vp-p
18
0
20
27
21.5
Vp-p
Vp-p
4.5
220
720
870
5.5
240
800
1000
V
mA
mA
mA
TABLE 1. BU-65570V/72V REQUIREMENTS AND
CAPABILITIES
HARDWARE REQUIREMENTS
VME or VXI Chassis with Controller Card and one free slot
minimum required, 233 MHz Processor or better recommended.
SOFTWARE REQUIREMENTS
Windows 95/98 or Windows NT or WindRiver VxWorksII
DDC’s BU-69068S0 or BUS-69068S2 software diskettes/CD-ROM
AVAILABLE OPERATIONS FOR EACH CHANNEL
Tests and Simulates MIL-STD-1553 BC and all 31 RT’s
Provides independent Monitor Mode Operation
Error injection and Detection
25
2
4
10
668
29
μsec
μsec
μsec
μsec
μsec
THERMAL
BU-65570V/72V
Operating Temperature
Storage Temperature
0
-40
+55
+85
°C
°C
PHYSICAL CHARACTERISTICS
Size “B”
Weight
9.2(W) X 6.3(H)
(223.7 X 160)
20.0
(567)
in
(mm)
oz
(g)
GENERAL
The BU-65570V/72V is DDC’s next generation VME/VXI
Tester/Simulator which can concurrently simulate a MIL-STD-1553
Bus Controller (BC), multiple (up to 31) Remote Terminals (RT’s), and
an intelligent Monitor (MT) simultaneously on all four 1553 buses.
The BU-65570V/72V supports VXI “Plug and Play” installation by
providing the signal MODID at J2. This signal can be enabled by
an on-board jumper to allow the host to signal the card during the
bus enumeration process. If it is not desirable to enable this sig-
nal, the jumper can be removed.
Full error detection features are provided in all modes of operation. In
addition, user specified errors - including bit count, and Manchester II
errors - may be injected in BC and any of the emulated RT modes.
Operational characteristics of the BU-65570V/72V such as
variable output voltage level, bus termination, and coupling
configuration are all software controllable using functions provid-
ed in the software library.
BUS CONTROLLER MODE
The BU-6557VI/72V Bus Controller supports all MIL-STD-1553B
message formats. Up to 1024 unique receive, transmit, mode
code, and RT to RT messages may be defined at one time for
each of the installed channels.
Programmable attributes within a message include time to next
message, bus (channel A or channel B), intermessage routines,
and injected error. The time to next message defines the time
from the start of the present message to the start of the next
message. The time to next message is programmable up to
65,535 msec in 1 μsec increments.
MINOR AND MAJOR FRAMES
The execution of messages is controlled by a message list
referred to as a frame. The frame specifies the contents and tim-
ing of complete communication runs by the BC. Each entry in the
frame is either a reference to a message or a special frame sym-
bol. The entire frame is referred to as a major frame and is divid-
ed into minor frames each of equal time duration.
The minor frame time is based on a programmable 32-bit
counter with 1 μsec resolution. The BU-65570V/72V supports
major frames of up to 1024 messages per installed channel, with
a period of up to 72 minutes.
BC ERROR INJECTION
Error conditions may be injected on a message by message
basis. The BU-65570V/72V supports three categories of injected
BC Errors: length errors, encoding errors, and gap errors. Length
Errors include both word count errors and bit count errors.
NOTES for TABLE 2:
1. 100% Duty Cycle at MAX Transmit Amplitude [28 Vp-p]
2. This time assumes that this card is not emulating BC.
3. This hardware time is enforced by the firmware. If an attempt to reduce this
time is made, the time will be stretched to 25 μsec.
4. This time is programmable from 2 μsec to 29 μsec in 1 μsec increments.
5. Transformer Coupled, Measured on Stub.
6. Programmable in 1024 steps, within approximate range listed.
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