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參數(shù)資料
| 型號： | BU-61582F2-431S |
| 廠商： | DATA DEVICE CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 1M bps, MIL-STD-1553 CONTROLLER, CDFP70 |
| 封裝： | CERAMIC, DFP-70 |
| 文件頁數(shù)： | 45/48頁 |
| 文件大?。?/td> | 378K |
| 代理商： | BU-61582F2-431S |
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6
Data Device Corporation
www.ddc-web.com
BU-61582
G-08/02-250
TABLE 2. SP’ACE SERIES RADIATION
SPECIFICATIONS
PART
NUMBER
TOTAL
DOSE
SINGLE EVENT
UPSET
SINGLE EVENT
LATCHUP
BU-61582(3)X0,
X1,X2
1 MRad
3.6 x 10-5
errors/device-day,
(LET Threshold of
59 MeV/mg/cm2)
Immune
QCI TESTING
MIL-STD-883, Method 1018
MIL-STD-883, Method 1010 Condition C
and MIL-STD-883, Method 2012
MIL-STD-883, Method 2012
MIL-STD-883, Method 2023
MIL-STD-883, Method 1015
MIL-STD-883, Method 2020 Condition A
MIL-H-38534
MIL-STD-883, Method 2018
MIL-STD-883, Method 2010 Condition A
MIL-STD-750, Method 2072 and 2073
MIL-STD-883, Method 2032 Class S
METHOD
Moisture Content Limit of
5000 PPM
Extended Temperature
Cycling:
20 Cycles Including
Radiographic (X-Ray)
Testing
Radiographic (X-Ray)
Analysis
100% Non-Destructive
Wirebond Pull
320-Hour Burn-In
Particle Impact Noise
Detection (PIND)
Element Evaluation:
Visual,
Electrical,
Wire Bondability,
24-Hour Stabilization Bake,
10 Temperature Cycles
5000 g’s constant acceleration
240-Hour Powered Burn-In
and 1000-Hour Life Test
(Burn-In and 1000-Hour Life
Test Are Only Required For
Active Components.)
SEM Analysis for Integrated
Circuits
Visual Inspection:
Integrated Circuits
Transistors & Diodes
Passive Components
ASSEMBLY & TEST
ELEMENT EVALUATION
TABLE 3. HIGH RELIABILITY SCREENING OPTIONS
BU-61582(3)X3
BU-61582(3)X6
175 KRad
3.6 x 10-5
errors/device-day,
(LET Threshold of
59 MeV/mg/cm2)
Immune
RADIATION HARDNESS
The BU-61582 combines analog bipolar transceivers with logic
and RAM fabricated by Honeywell Solid State Electronics
Center’s (SSEC) 0.8 micron Radiation Insensitive CMOS (RIC-
MOS-4) process to provide radiation survivabilty.
To summarize, the BU-61582 has a total gamma dose immunity
of 1 MRad and an LET threshold of 59 MeV/mg/cm2, providing
a soft error rate of 3.6 x 10-5 errors/device-day. Since the trans-
ceiver is bipolar and the digital logic and RAM is implemented in
Honeywell’s RICMOS process, the hybrids are inherently
immune to latchup.
HIGH-REL SCREENING
DDC is committed to the design and manufacture of hybrids and
transformers with enhanced processing and screening for space-
borne applications and other systems requiring the highest lev-
els of reliability. These platforms include launch vehicles, satel-
lites and the International Space Station.
DDC has tailored its design methodologies to optimize the fabri-
cation of space level hybrids. The intent of the design guidelines
is to minimize the number of die and wirebonds, minimize the
number of substrate layers, and maximize the space between
components. DDC’s space grade products combine analog bipo-
lar and rad hard CMOS technology to provide various levels of
radiation tolerance.
The BU-61582 is packaged in a 70-pin ceramic package. In con-
trast to Kovar (metal) packages, the use of ceramic eliminates
the hermeticity problems associated with the glass beads used
in the metal packages. In addition, ceramic packages provide
more rigid leads, better thermal properties, easier wirebonding,
and lower weight.
The production of the space level hybrids can entail enhanced
screening steps beyond DDC’s standard flow. This includes
Condition A visual inspection, SEM analysis, and element evalu-
ation for all integrated circuit die. For the hybrids, additional
screening includes Particle Impact Noise Detection (PIND), 320-
hour burn-in, 100% non-destructive wirebond pull, X-ray analy-
sis, as well as Destructive Physical Analysis (DPA) testing,
extended temperature cycling for QCI testing, and a moisture
content limit of 5000 PPM. TABLE 3 summarizes the procure-
ment screening, element evaluation, and hybrid screening used
in the production of the BU-61582.
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