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參數(shù)資料
| 型號(hào)： | BTS728L2 |
| 廠商： | SIEMENS A G |
| 元件分類： | 外設(shè)及接口 |
| 英文描述： | Smart High-Side Power Switch Two Channels: 2 x 60mW Status Feedback |
| 中文描述： | 4 A 2 CHANNEL, BUF OR INV BASED PRPHL DRVR, PDSO20 |
| 封裝： | PLASTIC, SO-20 |
| 文件頁(yè)數(shù)： | 8/14頁(yè) |
| 文件大?。?/td> | 241K |
| 代理商： | BTS728L2 |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)當(dāng)前第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)
BTS 728 L2
Semiconductor Group
Page 3
1999-Mar-23
Maximum Ratings at Tj = 25°C unless otherwise specified
Parameter
Symbol
Values
Unit
Supply voltage (overvoltage protection see page 4)
Vbb
43
V
Supply voltage for full short circuit protection
Tj,start = -40 ...+150°C
Vbb
24
V
Load current (Short-circuit current, see page 5)
IL
self-limited
A
Load dump protection1)
VLoadDump = VA + Vs, VA = 13.5 V
RI2) = 2
, td = 200 ms; IN = low or high,
each channel loaded with
RL = 8.0
,
VLoaddump3)
60
V
Operating temperature range
Storage temperature range
Tj
Tstg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC)4)
Ta = 25°C:
(all channels active)
Ta = 85°C:
Ptot
3.7
1.9
W
Maximal switchable inductance, single pulse
Vbb = 12V, Tj,start = 150°C4),
IL = 4.0 A, EAS = 220 mJ, 0
one channel:
IL = 6.0 A, EAS = 540 mJ, 0
two parallel channels:
see diagrams on page 9
ZL
19.9
22.3
mH
Electrostatic discharge capability (ESD)
IN:
(Human Body Model)
ST:
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5k
; C=100pF
VESD
1.0
4.0
8.0
kV
Input voltage (DC)
VIN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
IIN
IST
±2.0
±5.0
mA
Thermal Characteristics
Parameter and Conditions
Symbol
Values
Unit
min
typ
Max
Thermal resistance
junction - soldering point4),5)
each channel:
Rthjs
--
13.5
K/W
junction - ambient4)
one channel active:
all channels active:
Rthja
--
41
34
--
1
)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150
resistor for the GND connection is recommended.
2)
RI = internal resistance of the load dump test pulse generator
3)
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
4
)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm
2 (one layer, 70
m thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
5
)
Soldering point: upper side of solder edge of device pin 15. See page 14
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