Philips Semiconductors
Product specification
Thyristor
logic level
BT169W Series
Fig.1. Maximum on-state dissipation, P
, versus
average on-state current, I
T(AV)
, where a = form
factor = I
T(RMS)
T(AV)
.
Fig.2. Maximum permissible non-repetitive peak
on-state current I
, versus pulse width t
p
, for
sinusoidal currents, t
p
≤
10ms.
Fig.3. Maximum permissible rms current I
T(RMS)
,
versus solder point temperature T
sp
.
Fig.4. Maximum permissible non-repetitive peak
on-state current I
, versus number of cycles, for
sinusoidal currents, f = 50 Hz.
Fig.5. Maximum permissible repetitive rms on-state
current I
T(RMS)
, versus surge duration, for sinusoidal
sp
≤
112C.
Fig.6. Normalised gate trigger voltage
V
GT
(T
j
)/ V
GT
(25C), versus junction temperature T
j
.
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0
0.2
0.4
0.6
0.8
1
a = 1.57
1.9
2.2
2.8
4
BT169W
IF(AV) / A
Ptot / W
125
122
119
116
113
110
Tsp(max) / C
conduction
30
60
90
120
180
form
a
4
2.8
2.2
1.9
1.57
1
10
100
1000
0
2
4
6
8
10
BT169
Number of half cycles at 50Hz
ITSM / A
T
ITSM
time
I
Tj initial = 25 C max
T
1
10
100
1000
BT169
100us
1ms
10ms
T / s
ITSM / A
T
ITSM
time
I
Tj initial = 25 C max
T
0
0.1
1
10
0.5
1
1.5
2
BT134W
surge duration / s
IT(RMS) / A
-50
0
50
100
150
0
0.2
0.4
0.6
0.8
1
1.2
BT134W
Tsp / C
IT(RMS) / A
112 C
-50
0
50
100
150
0.4
0.6
0.8
1
1.2
1.4
1.6
BT151
Tj / C
VGT(Tj)
VGT(25 C)
September 1997
3
Rev 1.200