參數(shù)資料
型號: BR24L32FV-W
廠商: Rohm CO.,LTD.
英文描述: 4k】8 bit electrically erasable PROM
中文描述: 4K的】8位電可擦除可編程ROM
文件頁數(shù): 10/26頁
文件大小: 443K
代理商: BR24L32FV-W
BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-W
Memory ICs
10/25
z
Byte write
SDA
LINE
WP
S
T
A
R
T
SLAVE
ADDRESS
1 0
0
1
R
/
W
W
R
I
T
E
A
C
K
A
C
K
D7
DATA
D0
S
T
O
P
Fig.8 BYTE WRITE CYCLE TIMING
A
C
K
1st WORD
ADDRESS
2nd WORD
ADDRESS
A
C
K
WA
0
11
Don't care
A0
A1
A2
By using this command, the data is programmed into the indicated word address.
When the master generates a STOP condition, the device begins the internal write cycle to the nonvolatile memory
array.
z
Page write
Fig.9 PAGE WRITE CYCLE TIMING
SDA
LINE
WP
S
T
A
R
T
SLAVE
ADDRESS
1 0
0
1
R
/
W
W
R
I
T
E
A
C
K
A
C
K
A
C
K
D7
DATA (n)
D0
DATA (n+31)
D0
S
T
O
P
A
C
K
1st WORD
ADDRESS (n)
2nd WORD
ADDRESS (n)
A
C
K
WA
0
WA
11
Don't care
A0
A1
A2
This device is capable of thirty-two byte Page Write operation.
When two or more byte data are inputted, the five low order address bits are internally incremented by one after the
receipt of each word. The seven higher order bits of the address (WA11 to WA5) remain constant.
If the master transmits more than thirty-two words, prior to generating the STOP condition, the address counter will
“roll over”, and the previous transmitted data will be overwritten.
相關(guān)PDF資料
PDF描述
BR24L32 4k】8 bit electrically erasable PROM
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