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參數(shù)資料
| 型號： | BR24L32 |
| 廠商： | Rohm CO.,LTD. |
| 英文描述： | 4k】8 bit electrically erasable PROM |
| 中文描述： | 4K的】8位電可擦除可編程ROM |
| 文件頁數(shù)： | 11/26頁 |
| 文件大小： | 443K |
| 代理商： | BR24L32 |
BR24L32-W / BR24L32F-W / BR24L32FJ-W / BR24L32FV-W
Memory ICs
11/25
z
Current read
SDA
LINE
S
T
A
R
T
SLAVE
ADDRESS
1
1
R
/
W
A
C
K
A
C
K
DATA
S
T
O
P
0
0
A2 A1 A0
D7
D0
R
E
A
D
Fig.10 CURRENT READ CYCLE TIMING
In case that the previous operation is Random or Current Read (which includes Sequential Read respectively), the
internal address counter is increased by one from the last accessed address (n).
Thus Current Read outputs the data of the next word address (n
+
1).
If the last command is Byte or Page Write, the internal address counter stays at the last address (n).
Thus Current Read outputs the data of the word address (n).
If an Acknowledge is detected, and no STOP condition is generated by the master (
μ
-COM), the device will continue
to transmit the data.
[
It can transmit all data (32kbit 4096word)
]
If an Acknowledge is not detected, the device will terminate further data transmissions and await a STOP condition
before returning to the standby mode.
Note) If an Acknowledge is detected with “Low” level, not “High” level, command will become Sequential Read.
So the device transmits the next data, Read is not terminated. In the case of terminating Read, input
Acknowledge with “High” always, then input stop condition.
z
Random read
SLAVE
ADDRESS
SDA
LINE
S
T
A
R
T
1
1
0
0 A2A1A0
A2A1A0
R
/
W
W
R
I
T
E
Fig.11 RANDOM READ CYCLE TIMING
S
T
O
P
A
C
K
R
E
A
D
DATA(n)
SLAVE
ADDRESS
S
T
A
R
T
R
/
W
A
C
K
1
1
0
0
D7
D0
WA
0
2nd WORD
ADDRESS(n)
A
C
K
1st WORD
ADDRESS(n)
WA
11
A
C
K
A
C
K
Don't care
Random read operation allows the master to access any memory location indicated word address.
If an Acknowledge is detected, and no STOP condition is generated by the master (
μ
-COM), the device will continue
to transmit the data.
[
It can transmit all data (32kbit 4096word)
]
If an Acknowledge is not detected, the device will terminate further data transmissions and await a STOP condition
before returning to the standby mode.
Note) If an Acknowledge is detected with “Low” level, not “High” level, command will become Sequential Read.
So the device transmits the next data, Read is not terminated. In the case of terminating Read, input
Acknowledge with “High” always, then input stop condition.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| BR24L32F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| BR24L32FJ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:EEPROM |
| BR24L32FJ-W | 制造商:ROHM 制造商全稱:Rohm 功能描述:4k】8 bit electrically erasable PROM |
| BR24L32FJ-WE2 | 功能描述:電可擦除可編程只讀存儲器 SRL 4KX8 BIT RoHS:否 制造商:Atmel 存儲容量:2 Kbit 組織:256 B x 8 數(shù)據(jù)保留:100 yr 最大時鐘頻率:1000 KHz 最大工作電流:6 uA 工作電源電壓:1.7 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:SOIC-8 |
| BR24L32FJ-WTR | 制造商:ROHM 制造商全稱:Rohm 功能描述:High Reliability Series EEPROMs I2C BUS |
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