參數(shù)資料
型號: BR24L16FV-W
廠商: Rohm CO.,LTD.
英文描述: 2k】8 bit electrically erasable PROM
中文描述: 2k】8位電可擦除可編程ROM
文件頁數(shù): 15/26頁
文件大?。?/td> 390K
代理商: BR24L16FV-W
BR24L16-W / BR24L16F-W / BR24L16FJ-W /
Memory ICs
BR24L16FV-W / BR24L16FVM-W
15/25
3) Acknowledge polling
Since the device ignore all input commands during the internal write cycle, no ACK will be returned.
When the master send the next command after the wire command, if the device returns the ACK, it means that the
program is completed. If no ACK id returned, it means that the device is still busy.
By using Acknowledge polling, the waiting time is minimized less than t
WR
=5ms.
In case of operating Write or Current Read right after Write, first, send the slave address (R / W is “HIGH” or “LOW”
respectively). After the device returns the ACK, continue word address input or data output respectively.
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
S
T
A
R
T
A
C
K
H
A
C
K
L
A
C
K
L
A
C
K
L
A
C
K
H
A
C
K
H
S
T
O
P
S
T
O
P
WRITE COMMAND
SLAVE
ADDRESS
SLAVE
ADDRESS
SLAVE
ADDRESS
SLAVE
ADDRESS
WORD
ADDRESS
DATA
t
WR
t
WR
Fig.15 SUCCESSIVE WRITE OPERATION BY ACKNOWLEDGE POLLING
During the internal write cycle,
no ACK will be returned.
(ACK
=
HIGH)
After the internal write cycle
is completed ACK will be returned
(ACK
=
LOW). Then input next
Word Address and data.
THE FIRST WRITE COMMAND
THE SECOND WRITE COMMAND
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BR24L16FVM-W 2k】8 bit electrically erasable PROM
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