參數(shù)資料
型號: BR24C04F-W
廠商: Rohm CO.,LTD.
元件分類: 圓形連接器
英文描述: Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT02; Number of Contacts:8; Connector Shell Size:12; Connecting Termination:Solder; Circular Shell Style:Box Mount Receptacle
中文描述: 兼容I2C總線串行EEPROM
文件頁數(shù): 5/13頁
文件大?。?/td> 341K
代理商: BR24C04F-W
BR24C01A-W / BR24C01AF-W / BR24C01AFJ-W / BR24C01AFV-W / BR24C02-W / BR24C02F-W /
Memory ICs
BR24C02FJ-W / BR24C02FV-W / BR24C04-W / BR24C04F-W / BR24C04FJ-W / BR24C04FV-W
(4) Device addressing
– BR24C01A-W / AF-W / AFJ-W / AFV-W, BR24C02-W / F-W / FJ-W / FV-W
1) Make sure the slave address is output from the master immediately after the start condition.
2) The upper four bits of the slave address are used to determine the device type. The device code for this IC is
fixed at “1010”.
3) The next three bits of the slave address (A2, A1, A0 … device address) are used to select the device. This IC
can address up to eight devices on the same bus.
4) The lowermost bit of the slave address (R / W … READ / WRITE) is used to set the write or read mode as follows.
R / W set to 0 … Write
(Random read word address setting is also 0)
R / W set to 1 … Read
A2
A1
A0
1010
R / W
– BR24C04-W / F-W / FJ-W / FV-W
1) Make sure the slave address is output from the master in continuation with the start condition.
2) The upper four bits of the slave address are used to determine the device type. The device code for this IC is
fixed at “1010”.
3) The next two bits of the slave address (A2, A1, … device address) are used to select the device. This IC can
address up to four devices on the same bus.
4) The next bit of the slave address (PS … Page Select) is used to select the page. As shown below, it can write to
or read from any of the 256 words in the two pages in memory.
PS set to 0 … Page 1 (000 to 0FF)
PS set to 1 … Page 2 (100 to 1FF)
5) The lowermost bit of the slave address (R / W … READ / WRITE) is used to set the write or read mode as follows.
R / W set to 0 … Write
(Random read word address setting is also 0)
R / W set to 1 … Read
A2
A1
PS
1010
R / W
(5) Write protect (WP)
When WP pin set to V
CC
(High level), write protect is set by all address. When WP pin set to GND (Low level),
enable to write to all address. Either control this pin or connect to GND (or V
CC
). It is inhibited from being left
unconnected.
(6) ACK signal
The acknowledge signal (ACK signal) is determined by software and is used to indicate whether or not a data transfer
is proceeding normally. The transmitting device, whether the master or slave, opens the bus after an 8-bit data
output (
μ
-COM when a write or read command of the slave address input ; this IC when reading data).
For the receiving device during the ninth clock cycle, SDA is set to LOW and an acknowledge signal (ACK signal) is
sent to indicate that it received the 8-bit data (this IC when a write command or a read command of the slave address
input,
μ
-COM when a read command data output).
The ICs output a LOW acknowledge signal (ACK signal) after recognizing the start condition and slave address (8
bits).
When data is being write to the ICs, a LOW acknowledge signal (ACK signal) is output after the receipt of each eight
bits of data (word address and write data).
相關(guān)PDF資料
PDF描述
BR24C04FJ-W The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
BR24C04FV-W The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
BR24C01A-W The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
BR24C01AF-W The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
BR24C01AFV-W The CAT24FC02 is a 2-kb Serial CMOS EEPROM internally organized as 256 words of 8 bits each
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