
2.
DesignCapacity (DC):
The DC is the user-specified battery capacity and is
programmed by using an external EEPROM. The
DC also provides the 100% reference for the abso-
lute display mode.
3.
Remaining Capacity (RM):
RM counts up during charge to a maximum value of
FCC and down during discharge and self-discharge to
0. RM is reset to 0000Ah when EDV1 = 1 and a valid
charge is detected. To prevent overstatement of
charge during periods of overcharge, RM stops in-
crementing when RM = FCC. RM may optionally
be written to a user-defined value when fully
charged when the battery pack is under bq2092
charge control. See the Charge Control section for
further details.
4.
Discharge Count Register (DCR):
The DCR counts up during discharge independent
of RM and can continue increasing after RM has
decremented to 0. Before RM = 0 (empty battery),
both discharge and self-discharge increment the
DCR.
After RM = 0, only discharge increments
the DCR. The DCR resets to 0 when RM = FCC.
The DCR does not roll over but stops counting
when it reaches FFFFh.
The DCR value becomes the new FCC value on the
first charge after a valid discharge to V
EDV1
if:
No valid charge initiations (charges greater than
10mAh, where V
SRO
 > |V
SRD
|) occurred during
the period between RM = FCC and EDV1 de-
tected.
The self-discharge count is not more than
256mAh.
The temperature is
 ≥
 273°K (0°C) when the
EDV1 level is reached during discharge.
The valid discharge flag (VDQ) indicates whether
the present discharge is valid for FCC update. FCC
cannot be reduced by more than 256mAh during
any single cycle.
Charge Counting
Charge activity is detected based on a positive voltage
on the V
SR
 input.
If charge activity is detected, the
bq2092 increments RM at a rate proportional to V
SRO
and, if enabled, activates an LED display.
actions increment the RM after compensation for charge
rate and temperature.
Charge
The bq2092 determines charge activity sustained at a
continuous rate equivalent to V
SRO
 > |V
SRD
|.
 A valid
charge equates to sustained charge activity
greater than 10 mAh
. Once a valid charge is detected,
charge counting continues until V
SRO
 falls below
|V
SRD
|.
V
SRD
 is a programmable threshold as
described in the Digital Magnitude Filter section.
Discharge Counting
All discharge counts where V
SRO
 < |V
SRD
| cause the
RM register to decrement and the DCR to increment.
V
SRD
 is a programmable threshold as described in the
Digital Magnitude Filter section.
Self-Discharge Estimation
The bq2092 continuously decrements RM and incre-
ments DCR for self-discharge based on time and
temperature. The self-discharge rate is dependent on
the battery chemistry. The bq2092 self-discharge esti-
mation rate is externally programmed in EEPROM
6
bq2092
TRate and
Compensation
Temperature
Charge
Current
Discharge
Current
Self-Discharge
Timer
Capacity
(RM)
Full
Charge
(FCC)
DiCount
Register
(DCR)
<
Transfer
+
Temperature, Other Data 
+
-
-
+
Inputs
Main Counters
and Capacity
Reference (FCC)
Outputs
Two-Wire
Serial Interface
Chip-Controlled
AvLED Display
TRate and
Compensation
Figure 2. Operational Overview