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參數(shù)資料
| 型號： | BCM5632 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PBGA785 |
| 封裝： | BGA-785 |
| 文件頁數(shù)： | 2/2頁 |
| 文件大?。?/td> | 118K |
| 代理商： | BCM5632 |
O V E R V I E W
Phone: 949-450-8700
Fax: 949-450-8710
E-mail: info@broadcom.com
Web: www.broadcom.com
BROADCOM CORPORATION
16215 Alton Parkway, P.O. Box 57013
Irvine, California 92619-7013
2004 by BROADCOM CORPORATION. All rights reserved.
5632-PB04-R
07/08/04
Broadcom
, the pulse logo, and
Connecting everything
are trademarks of Broadcom Corporation and/
or its subsidiaries in the United States and certain other countries. All other trademarks mentioned are the
property of their respective owners.
The BCM5632 switching processor chip supports 12 Gigabit ports and
one 10-Gigabit uplink with all ports in wirespeed operation. The
BCM5632 is ideal for applications such as multi-Gigabit port switches
or aggregating multiple-Gigabit ports to a 10-Gigabit backplane.
For Gigabit ports, the BCM5632 supports PCS (802.3z, 1000BASE-X)
or GMII (802.3ab, 1000BASE-T) interfaces with full-duplex operation
at Gigabit speed, and full- or half-duplex operation at 10/100 Mbps speed
(using 1000BASE-T). For the uplink port, the BCM5632 supports
XGMII.
The BCM5632 supports 802.1Q VLAN tagging as an option (Qon). The
BCM5632 supports 802.1v VLAN Classification by Protocol. There are
four user-programmable protocols that can be set up per port by the
VLAN Classification EtherType and the VLAN Priority/TAG registers.
The BCM5632 supports both port-based and tagged (802.1q and
802.3ac) Virtual LAN (VLAN). The BCM5632 also supports 4K VLAN
addresses with the 802.1s Multiple Spanning Tree option, and flexible
and programmable ingress and egress checking rules for VLAN
processing.
The BCM5632 supports Ethernet frames with lengths from 64 bytes to
9KB. Runt or long frames are dropped at the input port. The minimum
inter-packet gap (IPG) is assumed to be 64-bit IDLE plus 32-bit
preamble. Packets with shorter than minimum IPG are not dropped, but
wirespeed performance is not guaranteed.
The BCM5632 also supports 802.3ad port aggregation. The 12-Gigabit
ports can form up to six trunks, with a maximum of twelve ports in a
trunk. The distribution algorithm is user-selectable. The Link
Aggregation Control Protocol (LACP) frames are handled by the
accompanying CPU and the marker protocol is handled in hardware.
The BCM5632 can be initialized and configured by an EEPROM or a
CPU, which is also responsible for search table updates and management
functions. The CPU is a separate port to the device, containing its own
Tx FIFO and Rx FIFO. The device implements a 32-bit, 33-MHz
peripheral component interconnect (PCI) for flexible CPU selection and
interface.
Other features include frame trapping and forwarding to the CPU, port
monitoring, and broadcast storm control to reduce broadcast traffic
through the switch. The BCM5632 also offers a flexible Multiplexer
mode in which the L2 switching functionality can be turned on and off.
Shared Buffer
Buffer
Manager
Output
Queueing
MIB
Counters
PCI
Interface
T
R
T
R
Serial
to
Parallel
Parallel
to
Serial
10 G MAC
L2 MAC
Table
Table
Maintenance
To CPU
T
R
G MAC
10 G-Port
G-Port
T
R
G MAC
G-Port
VLAN
Table
Port
Manager
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