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參數(shù)資料
| 型號(hào)： | AZ88943U |
| 廠商： | Arizona Microtek, Inc. |
| 英文描述： | High-Speed Limiting Post Amplifier |
| 中文描述： | 高速限幅后置放大器 |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 64K |
| 代理商： | AZ88943U |
AZ88943
High-Speed Limiting Post Amplifier
1630 S. STAPLEY DR., SUITE 127
MESA, ARIZONA 85204
USA
(480) 962-5881
FAX (480) 890-2541
www.azmicrotek.com
ARIZONA MICROTEK, INC.
FEATURES
Up to 2.5Gbps operation
Differential PECL Inputs
Differential PECL Outputs
Open Drain TTL/CMOS SD Output
TTL/CMOS Enable Input
High-Speed SiGe Process
DESCRIPTION
The AZ88943 is a limiting post amplifier usable at data rates up to 2.5Gbps. It is ideal for use as a post
amplifier following a transimpedance amplifier.
The AZ88943 contains a programmable signal detect function to determine when the input signal is present.
This information can be used with the /EN input pin to disable the output under loss of signal conditions. The detect
threshold can be set with a resistor divider between V
CC
and V
REF
. The SD output is an open drain compatible with
CMOS and TTL.
The outputs produce standard PECL 100K voltage compensated levels.
/D
IN
/D
OUT
3
8
BLOCK DIAGRAM
D
IN
/D
IN
D
OUT
/D
OUT
/EN
SD
SD
LVL
V
REF
PACKAGE AVAILABILITY
PART NUMBER
PACKAGE
MARKING
AZ88
943
NOTES
TSSOP 10
AZ88943U
1,2,3
1
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K
parts) Tape & Reel.
Date code format: “Y” or “YY” for year followed by “WW” for week.
Parts marked JNB for date codes prior to 4WW (prior to 2004).
Date code “YWW” or “YYWW” on underside of part.
2
3
4
/EN
D
IN
SD
LVL
V
REF
V
CC
D
OUT
GND
1
2
4
5
TSSOP-10
10
9
7
6
SD
PIN DESCRIPTION
PIN
FUNCTION
Differential Inputs
PECL Outputs
Output Enable
Signal Detect Threshold
SD Output
Reference Voltage Output
Positive Voltage
Ground
D
IN
, /D
IN
D
OUT
, /D
OUT
/EN
SD
LVL
SD
V
REF
V
CC
GND
PINOUT ASSIGNMENT
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