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參數(shù)資料
| 型號： | AX88140AP |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Fast Ethernet MAC Controller |
| 中文描述： | 快速以太網(wǎng)MAC控制器 |
| 文件頁數(shù)： | 28/46頁 |
| 文件大小： | 467K |
| 代理商： | AX88140AP |
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AX88140A
PRELIMINARY
ASIX ELECTRONICS CORPORATION
28
Tab - 26 REG11 General -Purpose Timer Register Description
4.2.12 General -Purpose Port Register (REG12)
Field
R/W/C
31:9
-
Reserved.--Written as “0” for future compatibility concern.
Description
1
Indicate next write REG12<7:0> is use
for define General purpose port in/out
direction.
Indicate next write REG12<7:0> is use
for read/write general purpose port data.
8
R/W
GPC - General Purpose Control .
When a hardware reset is initiated, all gep pins
become input pins.
0
7:0
R/W
MD - General Purpose Mode and Data
Tab - 27 REG12 General -Purpose Port Register Description
4.2.13 Filtering Index (REG13)
FIELD
R/W/C
31:6
-
Reserved.--Written as “0” for future compatibility concern.
5:0
R/W
FI - Filtering Index
When writing data to filtering buffer, uses filtering index register REG13 to point the position (buffer
number) in filtering buffer. The valid value is between 0 and 3.
DESCRIPTION
Tab - 28 REG13 Filtering Index Register Description
4.2.14 Filtering data (REG14)
FIELD
R/W/C
31:0
R/W
FD - Filtering Data
By indexed by filtering index register REG13, write the filtering data register REG14 to put filtering
address/hash table into filtering buffer..
DESCRIPTION
Tab - 29 REG14 Filtering Data Register Description
Filtering Buffer
The AX88140A stores one Ethernet address for local physical address and filters the packets
with multicast addresses by 64 bits array. For any incoming frame with a multicast destination
address, the AX88140A applies the standard Ethernet cyclic redundancy check function to the
destination address, then uses the most significant 6 bits of the result as a bit index into the table. If
the indexed bit is set, the frame is accepted. If the bit is reset, the frame is rejected.
Description of Filtering Buffer
BUFFER
NUMBER
0
BYTE 0 - 3 OF LOCAL PHYSICAL ADDRESS
1
BYTE 4 - 5 OF LOCAL PHYSICAL ADDRESS IN THE LEAST SIGNIFICANT WORD
2
BIT 0 - 31 OF MULTICAST ADDRESS FILTERING TABLE
3
Bit 32 - 63 of multicast address filtering table
DESCRIPTION
Tab - 30 Description of Filtering Buffer
Layout of Filtering Buffer
BUFFER
NUMBER
0
BYTE 3
BYTE 2
BYTE 1
BYTE 0
PHYSICAL
ADDRESS BYTE 3
PHYSICAL ADDRESS
BYTE 2
PHYSICAL ADDRESS
BYTE 1
PHYSICAL ADDRESS
BYTE 0
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AX88140AQ | 制造商:ASIX 制造商全稱:ASIX 功能描述:Fast Ethernet MAC Controller |
| AX88141 | 制造商:ASIX 制造商全稱:ASIX 功能描述:100BASE-TX/FX PCI BUS FAST ETHERNET MAC CONTROLLER WITH POWER MANAGEMENT |
| AX88170L | 制造商:ASIX 制造商全稱:ASIX 功能描述:USB to Fast Ethernet/HomePNA Controller |
| AX88172 | 制造商:ASI 制造商全稱:ASI 功能描述:USB2.0 TO ETHERNET Device setup guide |
| AX88172A | 制造商:ASIX 制造商全稱:ASIX 功能描述:USB 2.0 to 10/100M Fast Ethernet Controller |
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