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XMEGA A [MANUAL]
8077I–AVR–11/2012
Table 4-1.
Boot reset fuse.
Bit 5:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to one
when this register is written.
Bit 1:0 – BODPD[1:0]: BOD Operation in Power-down Mode
These fuse bits set the BOD operation mode in all sleep modes except idle mode.
Table 4-2.
BOD operation modes in sleep modes.
4.16.4 FUSEBYTE4 – Fuse Byte 4
Bit 7:5 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to one
when this register is written.
Bit: 4 – RSTDISBL: External Reset Disable
This fuse can be programmed to disable the external reset pin functionality. When this is done, pulling the reset pin low
will not cause an external reset. A reset is required before this bit will be read correctly after it is changed.
Bit 3:2 – STARTUPTIME[1:0]: Start-up time
These fuse bits can be used to set at a programmable timeout period from when all reset sources are released until the
internal reset is released from the delay counter. A reset is required before these bits will be read correctly after they are
changed.
BOOTRST
Reset address
0
Reset vector = Boot loader reset
1
Reset vector = Application reset (address 0x0000)
BODPD[1:0]
Description
00
Reserved
01
BOD enabled in sampled mode
10
BOD enabled continuously
11
BOD disabled
Bit
765
4
3
2
1
0
+0x04
–
RSTDISBL
STARTUPTIME[1:0]
WDLOCK
JTAGEN
Read/Write
R/W
Initial Value
1
0