參數(shù)資料
型號(hào): ATSAM3U1CA-CU
廠商: Atmel
文件頁(yè)數(shù): 19/60頁(yè)
文件大?。?/td> 0K
描述: IC MCU 32BIT 64KB FLASH 100TFBGA
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
Cortex®-M3 Introduction and Specific SAM3U Implementation
SAM3U Cortex-M3 Based MCU Introduction
Touch Solutions on the Atmel ARM? Cortex?-M3 Based Flash Microcontrollers
標(biāo)準(zhǔn)包裝: 260
系列: SAM3U
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 96MHz
連通性: EBI/EMI,I²C,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 57
程序存儲(chǔ)器容量: 64KB(64K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 20K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 4x10b,4x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TFBGA
包裝: 托盤(pán)
配用: ATSAM3U-EK-ND - KIT EVAL FOR AT91SAM3U CORTEX
26
6430FS–ATARM–10-Feb-12
SAM3U Series
Even in all low power modes, asserting the pin will automatically start-up the chip and erase the
Flash.
7.
Processor and Architecture
7.1
ARM Cortex-M3 Processor
Version 2.0
Thumb-2 (ISA) subset consisting of all base Thumb-2 instructions, 16-bit and 32-bit.
Harvard processor architecture enabling simultaneous instruction fetch with data load/store.
Three-stage pipeline.
Single cycle 32-bit multiply.
Hardware divide.
Thumb and Debug states.
Handler and Thread modes.
Low latency ISR entry and exit.
7.2
APB/AHB Bridges
The SAM3U product embeds two separated APB/AHB bridges:
low speed bridge
high speed bridge
This architecture enables to make concurrent accesses on both bridges.
All the peripherals are on the low-speed bridge except SPI, SSC and HSMCI.
The UART, 10-bit ADC (ADC), 12-bit ADC (ADC12B), TWI0-1, USART0-3, PWM have dedicated
channels for the Peripheral DMA Channels (PDC). These peripherals can not use the DMA
Controller.
The high speed bridge regroups the SSC, SPI and HSMCI. These three peripherals do not have
PDC channels but can use the DMA with the internal FIFO for Channel buffering.
Note that the peripherals of the two bridges are clocked by the same source: MCK.
7.3
Matrix Masters
The Bus Matrix of the SAM3U device manages 5 masters, which means that each master can
perform an access concurrently with others to an available slave.
Each master has its own decoder and specifically defined bus. In order to simplify the address-
ing, all the masters have the same decoding.
Table 7-1.
List of Bus Matrix Masters
Master 0
Cortex-M3 Instruction/Data
Master 1
Cortex-M3 System
Master 2
Peripheral DMA Controller (PDC)
Master 3
USB Device High Speed DMA
Master 4
DMA Controller
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ATSAM3U1CB-AU 功能描述:ARM微控制器 - MCU LQFP, Grn, IT, MRL B RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
ATSAM3U1CB-CU 功能描述:ARM微控制器 - MCU TFBGA, Grn, IT MRL B RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
ATSAM3U1EA-AU 功能描述:ARM微控制器 - MCU 64K Flash, 20K SRAM 32-bit ARM Cortex M3 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
ATSAM3U1EA-CU 功能描述:ARM微控制器 - MCU 64K Flash, 20K SRAM 32-bit ARM Cortex M3 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT
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