參數(shù)資料
型號: ATSAM3A8CA-AU
廠商: Atmel
文件頁數(shù): 16/71頁
文件大小: 0K
描述: IC MCU 2X256KB CORTEX-M3 100-QFP
標(biāo)準(zhǔn)包裝: 90
系列: SAM3A
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 84MHz
連通性: CAN,I²C,IrDA,LIN,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲器容量: 512KB(512K x 8)
程序存儲器類型: 閃存
RAM 容量: 96K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
25
11057BS–ATARM–13-Jul-12
SAM3X/A
25
11057BS–ATARM–13-Jul-12
SAM3X/A
The Supply Controller, zero-power power-on reset, RTT, RTC, Backup registers and 32 kHz
Oscillator (RC or crystal oscillator selected by software in the Supply Controller) are running.
The regulator and the core supply are off.
Backup Mode is based on the Cortex-M3 deep-sleep mode with the voltage regulator disabled.
The SAM3X/A series can be awakened from this mode through the Force Wake-up pin (FWUP),
and Wake-up input pins WKUP0 to WKUP15, Supply Monitor, RTT or RTC wake-up event. Cur-
rent Consumption is 2.5 A typical on VDDBU.
Backup mode is entered by using WFE instructions with the SLEEPDEEP bit in the System Con-
trol Register of the Cortex-M3 set to 1. (See the Power management description in the “ARM
Cortex M3 Processor” section of the product datasheet).
Exit from Backup mode happens if one of the following enable wake up events occurs:
FWUP pin (low level, configurable debouncing)
WKUPEN0-15 pins (level transition, configurable debouncing)
SM alarm
RTC alarm
RTT alarm
5.5.2
Wait Mode
The purpose of the wait mode is to achieve very low power consumption while maintaining the
whole device in a powered state for a startup time of less than 10 s.
In this mode, the clocks of the core, peripherals and memories are stopped. However, the core,
peripherals and memories power supplies are still powered. From this mode, a fast start up is
available.
This mode is entered via Wait for Event (WFE) instructions with LPM = 1 (Low Power Mode bit in
PMC_FSMR). The Cortex-M3 is able to handle external events or internal events in order to
wake-up the core (WFE). This is done by configuring the external lines WKUP0-15 as fast
startup wake-up pins (refer to Section 5.7 “Fast Start-Up”). RTC or RTT Alarm and USB wake-up
events can be used to wake up the CPU (exit from WFE).
Current Consumption in Wait mode is typically 23 A for total current consumption if the internal
voltage regulator is used or 15 A if an external regulator is used.
Entering Wait Mode:
Select the 4/8/12 MHz Fast RC Oscillator as Main Clock
Set the LPM bit in the PMC Fast Startup Mode Register (PMC_FSMR)
Execute the Wait-For-Event (WFE) instruction of the processor
Note:
Internal Main clock resynchronization cycles are necessary between the writing of MOSCRCEN
bit and the effective entry in Wait mode. Depending on the user application, Waiting for
MOSCRCEN bit to be cleared is recommended to ensure that the core will not execute undesired
instructions.
5.5.3
Sleep Mode
The purpose of sleep mode is to optimize power consumption of the device versus response
time. In this mode, only the core clock is stopped. The peripheral clocks can be enabled. This
mode is entered via Wait for Interrupt (WFI) or Wait for Event (WFE) instructions with LPM = 0 in
PMC_FSMR.
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