參數(shù)資料
型號: ATSAM3A4CA-AU
廠商: Atmel
文件頁數(shù): 30/71頁
文件大?。?/td> 0K
描述: IC MCU 2X128KB CORTEX-M3 100-QFP
標(biāo)準(zhǔn)包裝: 90
系列: SAM3A
核心處理器: ARM? Cortex?-M3
芯體尺寸: 32-位
速度: 84MHz
連通性: CAN,I²C,IrDA,LIN,MMC,SPI,SSC,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,I²S,POR,PWM,WDT
輸入/輸出數(shù): 63
程序存儲器容量: 256KB(256K x 8)
程序存儲器類型: 閃存
RAM 容量: 64K x 8
電壓 - 電源 (Vcc/Vdd): 1.62 V ~ 1.95 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 16x12b,D/A 2x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-LQFP
包裝: 托盤
38
11057BS–ATARM–13-Jul-12
SAM3X/A
38
11057BS–ATARM–13-Jul-12
SAM3X/A
9.
Memories
9.1
Embedded Memories
9.1.1
Internal SRAM
The 100-pin SAM3A/X8 product embeds a total of 96 Kbytes high-speed SRAM (64 Kbytes
SRAM0 and 32 Kbytes SRAM1).
The 100-pin SAM3A/X4 product embeds a total of 64 Kbytes high-speed SRAM (32 Kbytes
SRAM0, 32 Kbytes SRAM1).
The 100-pin SAM3A/4 product embeds a total of 36 Kbytes high-speed SRAM (16 Kbytes
SRAM0 and 16 Kbytes SRAM1).
The SRAM0 is accessible over System Cortex-M3 bus at address 0x2000 0000 and SRAM1 at
address 0x2008 0000. The user can see the SRAM as contiguous thanks to mirror effect, giving
0x2007 0000 - 0x2008 7FFF for SAM3X/A8, 0x2007 8000 - 0x2008 7FFF for SAM3X/A4 and
0x2007 C000 - 0x2008 3FFF for SAM3X/A2.
The SRAM0 and SRAM1 are in the bit band region. The bit band alias region is mapped from
0x2200 0000 to 0x23FF FFFF.
The NAND Flash Controller embeds 4224 bytes of internal SRAM. If the NAND Flash controller
is not used, these 4224 Kbytes of SRAM can be used as general purpose. It can be seen at
address 0x2010 0000.
9.1.2
Internal ROM
The SAM3X/A series product embeds an Internal ROM, which contains the SAM-BA and FFPI
program.
At any time, the ROM is mapped at address 0x0018 0000.
9.1.3
Embedded Flash
9.1.3.1
Flash Overview
The Flash of the ATSAM3A/X8 is organized in two banks of 1024 pages (dual plane) of
256 bytes.
The Flash of the ATSAM3A/X4 is organized in two banks of 512 pages (dual plane) of
256 bytes.
The Flash contains a 128-byte write buffer, accessible through a 32-bit interface.
9.1.3.2
Flash Power Supply
The Flash is supplied by VDDCORE.
9.1.3.3
Enhanced Embedded Flash Controller
The Enhanced Embedded Flash Controller (EEFC) manages accesses performed by the mas-
ters of the system. It enables reading the Flash and writing the write buffer. It also contains a
User Interface, mapped within the Memory Controller on the APB.
The Enhanced Embedded Flash Controller ensures the interface of the Flash block with the 32-
bit internal bus. Its 128-bit wide memory interface increases performance.
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