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2545T–AVR–05/11
ATmega48/88/168
10. Power management and sleep modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
10.1
Sleep modes
their distribution. The figure is helpful in selecting an appropriate sleep mode.
Table 10-1 shows
the different sleep modes and their wake up sources.
Notes:
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
3. For INT1 and INT0, only level interrupt.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select
which sleep mode (Idle, ADC Noise Reduction, Power-down, Power-save, or Standby) will be
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the reset vector.
10.2
Idle mode
When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
mode, stopping the CPU but allowing the SPI, USART, analog comparator, ADC, 2-wire serial
interface, timer/counters, watchdog, and the interrupt system to continue operating. This sleep
mode basically halts clk
CPU and clkFLASH, while allowing the other clocks to run.
Table 10-1.
Active clock domains and wake-up sources in the different sleep modes.
Active clock domains
Oscillators
Wake-up sources
Sleep mode
clk
CPU
clk
FLASH
clk
IO
clk
ADC
clk
ASY
Main
cloc
k
so
urce
ena
b
led
Timer
oscill
ator
en
ab
le
d
INT
1
,INT0
and
pin
cha
nge
TWI
add
re
ss
match
Timer2
SPM
/EEPR
OM
ready
ADC
WDT
Other/O
Idle
X
XX
X
ADC noise
reduction
XX
X
XX
X
Power-down
XX
Power-save
X
XX
X
XX