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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ATMEGA8515-16MUR
寤犲晢锛� Atmel
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 85/257闋�(y猫)
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� MCU AVR 8KB FLASH 16MHZ 44QFN
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� megaAVR Introduction
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 4,000
绯诲垪锛� AVR® ATmega
鏍稿績铏曠悊鍣細 AVR
鑺珨灏哄锛� 8-浣�
閫熷害锛� 16MHz
閫ｉ€氭€э細 EBI/EMI锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯(c猫)/寰�(f霉)浣嶏紝POR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 35
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 8KB锛�4K x 16锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶�?銆�?/td> 512 x 8
RAM 瀹归噺锛� 512 x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.5 V ~ 5.5 V
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 44-VFQFN 瑁搁湶鐒婄洡
鍖呰锛� 甯跺嵎 (TR)
鍏跺畠鍚嶇ū锛� ATMEGA8515-16MUR-ND
ATMEGA8515-16MURTR
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175
ATmega8515(L)
2512K鈥揂VR鈥�01/10
Preventing Flash Corruption
During periods of low V
CC, the Flash program can be corrupted because the supply volt-
age is too low for the CPU and the Flash to operate properly. These issues are the same
as for board level systems using the Flash, and the same design solutions should be
applied.
A Flash program corruption can be caused by two situations when the voltage is too low.
First, a regular write sequence to the Flash requires a minimum voltage to operate cor-
rectly. Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage
for executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one
is sufficient):
1.
If there is no need for a Boot Loader update in the system, program the Boot
Loader Lock bits to prevent any Boot Loader software updates.
2.
Keep the AVR RESET active (low) during periods of insufficient power supply
voltage. This can be done by enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
CC
Reset Protection circuit can be used. If a Reset occurs while a write operation is
in progress, the write operation will be completed provided that the power supply
voltage is sufficient.
3.
Keep the AVR core in Power-down Sleep mode during periods of low V
CC. This
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the SPMCR Register and thus the Flash from unintentional
writes.
Programming Time for Flash
when using SPM
The calibrated RC Oscillator is used to time Flash accesses. Table 77 shows the typical
programming time for Flash accesses from the CPU.
Simple Assembly Code
Example for a Boot Loader
;-the routine writes one page of data from RAM to Flash
; the first data location in RAM is pointed to by the Y pointer
; the first data location in Flash is pointed to by the Z pointer
;-error handling is not included
;-the routine must be placed inside the boot space
; (at least the Do_spm sub routine). Only code inside NRWW section
can
; be read during Self-Programming (page erase and page write).
;-registers used: r0, r1, temp1 (r16), temp2 (r17), looplo (r24),
; loophi (r25), spmcrval (r20)
; storing and restoring of registers is not included in the routine
; register usage can be optimized at the expense of code size
;-It is assumed that either the interrupt table is moved to the
Boot
; loader section or that the interrupts are disabled.
.equ PAGESIZEB = PAGESIZE*2
;PAGESIZEB is page size in BYTES, not
words
.org SMALLBOOTSTART
Write_page:
; page erase
ldi
spmcrval, (1<<PGERS) | (1<<SPMEN)
rcallDo_spm
Table 77. SPM Programming Time
Symbol
Min Programming Time
Max Programming Time
Flash Write (Page Erase, Page
Write, and write Lock bits by SPM)
3.7 ms
4.5 ms
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
MAX7315ATE+T IC I/O EXPANDER I2C 8B 16TQFN-EP
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AT90USB162-16MUR IC AVR MCU 16K FLASH 32QFN
MAX7321ATE+T IC I/O EXPANDER I2C 8B 16TQFN-EP
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鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
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