參數(shù)資料
型號: ATMEGA644PA-PU
廠商: Atmel
文件頁數(shù): 44/160頁
文件大小: 0K
描述: IC MCU 8BIT 64KB FLASH 40DIP
產(chǎn)品培訓模塊: MCU Product Line Introduction
megaAVR Introduction
標準包裝: 10
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 64KB(32K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 40-DIP(0.600",15.24mm)
包裝: 管件
產(chǎn)品目錄頁面: 614 (CN2011-ZH PDF)
配用: ATSTK600-RC05-ND - STK600 ROUTING CARD AVR
138
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
16.12.7
OCR1BH and OCR1BL – Output Compare Register1 B
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT1). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16.12.8
OCR3AH and OCR3AL – Output Compare Register3 A
16.12.9
OCR3BH and OCR3BL – Output Compare Register3 B
The Output Compare Registers contain a 16-bit value that is continuously compared with the
counter value (TCNT3). A match can be used to generate an Output Compare interrupt, or to
generate a waveform output on the OCnx pin.
The Output Compare Registers are 16-bit in size. To ensure that both the high and low bytes are
written simultaneously when the CPU writes to these registers, the access is performed using an
8-bit temporary High Byte Register (TEMP). This temporary register is shared by all the other
16.12.10 ICR1H and ICR1L – Input Capture Register 1
The Input Capture is updated with the counter (TCNT1) value each time an event occurs on the
ICPn pin (or optionally on the Analog Comparator output for Timer/Counter1). The Input Capture
can be used for defining the counter TOP value.
The Input Capture Register is 16-bit in size. To ensure that both the high and low bytes are read
simultaneously when the CPU accesses these registers, the access is performed using an 8-bit
Bit
76543210
OCR1B[15:8]
OCR1BH
OCR1B[7:0]
OCR1BL
Read/Write
R/W
Initial Value
00000000
Bit
76543210
(0x99)
OCR3A[15:8]
OCR3AH
(0x98)
OCR3A[7:0]
OCR3AL
Read/Write
R/W
Initial Value
00000000
Bit
76543210
(0x9B)
OCR3B[15:8]
OCR3BH
(0x9A)
OCR3B[7:0]
OCR3BL
Read/Write
R/W
Initial Value
00000000
Bit
76543210
ICR1[15:8]
ICR1H
ICR1[7:0]
ICR1L
Read/Write
R/W
Initial Value
00000000
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