2011 Microchip Technology Inc.
Preliminary
DS41455B-page 185
PIC16LF1902/3
TABLE 20-3:
PIC16LF1902/3 ENHANCED INSTRUCTION SET
Mnemonic,
Operands
Description
Cycles
14-Bit Opcode
Status
Affected
Notes
MSb
LSb
BYTE-ORIENTED FILE REGISTER OPERATIONS
ADDWF
ADDWFC
ANDWF
ASRF
LSLF
LSRF
CLRF
CLRW
COMF
DECF
INCF
IORWF
MOVF
MOVWF
RLF
RRF
SUBWF
SUBWFB
SWAPF
XORWF
f, d
f
–
f, d
f
f, d
Add W and f
Add with Carry W and f
AND W with f
Arithmetic Right Shift
Logical Left Shift
Logical Right Shift
Clear f
Clear W
Complement f
Decrement f
Increment f
Inclusive OR W with f
Move f
Move W to f
Rotate Left f through Carry
Rotate Right f through Carry
Subtract W from f
Subtract with Borrow W from f
Swap nibbles in f
Exclusive OR W with f
1
00
11
00
11
00
11
00
0111
1101
0101
0111
0101
0110
0001
1001
0011
1010
0100
1000
0000
1101
1100
0010
1011
1110
0110
dfff
lfff
0000
dfff
1fff
dfff
ffff
00xx
ffff
C, DC, Z
Z
C, Z
Z
C
C, DC, Z
Z
2
BYTE ORIENTED SKIP OPERATIONS
DECFSZ
INCFSZ
f, d
Decrement f, Skip if 0
Increment f, Skip if 0
1(2)
00
1011
1111
dfff
ffff
1, 2
BIT-ORIENTED FILE REGISTER OPERATIONS
BCF
BSF
f, b
Bit Clear f
Bit Set f
1
01
00bb
01bb
bfff
ffff
2
BIT-ORIENTED SKIP OPERATIONS
BTFSC
BTFSS
f, b
Bit Test f, Skip if Clear
Bit Test f, Skip if Set
1 (2)
01
10bb
11bb
bfff
ffff
1, 2
LITERAL OPERATIONS
ADDLW
ANDLW
IORLW
MOVLB
MOVLP
MOVLW
SUBLW
XORLW
k
Add literal and W
AND literal with W
Inclusive OR literal with W
Move literal to BSR
Move literal to PCLATH
Move literal to W
Subtract W from literal
Exclusive OR literal with W
1
11
00
11
1110
1001
1000
0000
0001
0000
1100
1010
kkkk
001k
1kkk
kkkk
C, DC, Z
Z
C, DC, Z
Z
Note 1:
If the Program Counter (PC) is modified, or a conditional test is true, the instruction requires two cycles. The second cycle
is executed as a NOP.
2:
If this instruction addresses an INDF register and the MSb of the corresponding FSR is set, this instruction will require one
additional instruction cycle.
