參數(shù)資料
型號: ATMEGA3250-16AUR
廠商: Atmel
文件頁數(shù): 84/85頁
文件大?。?/td> 0K
描述: MCU AVR 32K FLASH 16MHZ 100TQFP
產(chǎn)品培訓模塊: megaAVR Introduction
標準包裝: 1,500
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 16MHz
連通性: SPI,UART/USART,USI
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 69
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 100-TQFP
包裝: 帶卷 (TR)
其它名稱: ATMEGA3250-16AUR-ND
8
2570N–AVR–05/11
ATmega325/3250/645/6450
2.3.11
Port J (PJ6..PJ0)
Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The
Port J output buffers have symmetrical drive characteristics with both high sink and source capa-
bility. As inputs, Port J pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port J pins are tri-stated when a reset condition becomes active,
even if the clock is not running.
Port J also serves the functions of various special features of the ATmega3250/6450 as listed on
2.3.12
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a
reset, even if the clock is not running. The minimum pulse length is given in Table 28-4 on page
301. Shorter pulses are not guaranteed to generate a reset.
2.3.13
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
2.3.14
XTAL2
Output from the inverting Oscillator amplifier.
2.3.15
AVCC
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally con-
nected to V
CC, even if the ADC is not used. If the ADC is used, it should be connected to VCC
through a low-pass filter.
2.3.16
AREF
This is the analog reference pin for the A/D Converter.
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