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  • 參數(shù)資料
    型號: ATMEGA324A-MUR
    廠商: Atmel
    文件頁數(shù): 99/160頁
    文件大?。?/td> 0K
    描述: IC MCU AVR 32K 20MHZ 44VQFN
    產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
    megaAVR Introduction
    標(biāo)準(zhǔn)包裝: 4,000
    系列: AVR® ATmega
    核心處理器: AVR
    芯體尺寸: 8-位
    速度: 20MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測/復(fù)位,POR,PWM,WDT
    輸入/輸出數(shù): 32
    程序存儲器容量: 32KB(16K x 16)
    程序存儲器類型: 閃存
    EEPROM 大?。?/td> 1K x 8
    RAM 容量: 2K x 8
    電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
    振蕩器型: 內(nèi)部
    工作溫度: -40°C ~ 85°C
    封裝/外殼: 44-VFQFN 裸露焊盤
    包裝: 帶卷 (TR)
    其它名稱: ATMEGA324A-MUR-ND
    43
    8272E–AVR–04/2013
    ATmega164A/PA/324A/PA/644A/PA/1284/P
    10.3
    BOD disable(1)
    When the Brown-out Detector (BOD) is enabled by BODLEVEL fuses, Table 27-3 on page 299,
    the BOD is actively monitoring the power supply voltage during a sleep period. To save power, it
    is possible to disable the BOD by software for some of the sleep modes, see Table 10-1 on page
    42. The sleep mode power consumption will then be at the same level as when BOD is globally
    disabled by fuses. If BOD is disabled in software, the BOD function is turned off immediately
    after entering the sleep mode. Upon wake-up from sleep, BOD is automatically enabled again.
    This ensures safe operation in case the V
    CC level has dropped during the sleep period.
    When the BOD has been disabled, the wake-up time from sleep mode will be approximately 60
    s to ensure that the BOD is working correctly before the MCU continues executing code.
    BOD disable is controlled by bit 6, BODS (BOD Sleep) in the control register MCUCR, see
    ”MCUCR – MCU Control Register” on page 48. Writing this bit to one turns off the BOD in rele-
    vant sleep modes, while a zero in this bit keeps BOD active. Default setting keeps BOD active,
    that is, BODS set to zero.
    Writing to the BODS bit is controlled by a timed sequence and an enable bit, see ”MCUCR –
    Note:
    1. Only available in the Atmel ATmega164PA/324PA/644PA/1284P.
    10.4
    Idle mode
    When the SM2..0 bits are written to 000, the SLEEP instruction makes the MCU enter Idle
    mode, stopping the CPU but allowing the SPI, USART, Analog Comparator, ADC, two-wire
    Serial Interface, Timer/Counters, Watchdog, and the interrupt system to continue operating. This
    sleep mode basically halts clk
    CPU and clkFLASH, while allowing the other clocks to run.
    Idle mode enables the MCU to wake up from external triggered interrupts as well as internal
    ones like the Timer Overflow and USART Transmit Complete interrupts. If wake-up from the
    Analog Comparator interrupt is not required, the Analog Comparator can be powered down by
    setting the ACD bit in the Analog Comparator Control and Status Register – ACSR. This will
    reduce power consumption in Idle mode. If the ADC is enabled, a conversion starts automati-
    cally when this mode is entered.
    10.5
    ADC Noise Reduction mode
    When the SM2..0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC
    Noise Reduction mode, stopping the CPU but allowing the ADC, the external interrupts, two-wire
    Serial Interface address match, Timer/Counter2 and the Watchdog to continue operating (if
    enabled). This sleep mode basically halts clkI/O, clkCPU, and clkFLASH, while allowing the
    other clocks to run.
    This improves the noise environment for the ADC, enabling higher resolution measurements. If
    the ADC is enabled, a conversion starts automatically when this mode is entered. Apart form the
    ADC Conversion Complete interrupt, only an External Reset, a Watchdog System Reset, a
    Watchdog interrupt, a Brown-out Reset, a two-wire serial interface interrupt, a Timer/Counter2
    interrupt, an SPM/EEPROM ready interrupt, an external level interrupt on INT7:4 or a pin
    change interrupt can wakeup the MCU from ADC Noise Reduction mode.
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