參數(shù)資料
型號: ATMEGA324A-MCHR
廠商: Atmel
文件頁數(shù): 80/160頁
文件大小: 0K
描述: IC MCU AVR 32K 20MHZ 44QFN
產品培訓模塊: MCU Product Line Introduction
megaAVR Introduction
標準包裝: 6,000
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 20MHz
連通性: I²C,SPI,UART/USART
外圍設備: 欠壓檢測/復位,POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 32KB(16K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉換器: A/D 8x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 帶卷 (TR)
其它名稱: ATMEGA324A-MCHR SL383
ATMEGA324A-MCHR-ND
ATMEGA324A-MCHRTR
26
8272E–AVR–04/2013
ATmega164A/PA/324A/PA/644A/PA/1284/P
When the write access time has elapsed, the EEPE bit is cleared by hardware. The user soft-
ware can poll this bit and wait for a zero before writing the next byte. When EEPE has been set,
the CPU is halted for two cycles before the next instruction is executed.
Bit 0 – EERE: EEPROM Read Enable
The EEPROM Read Enable Signal EERE is the read strobe to the EEPROM. When the correct
address is set up in the EEAR Register, the EERE bit must be written to a logic one to trigger the
EEPROM read. The EEPROM read access takes one instruction, and the requested data is
available immediately. When the EEPROM is read, the CPU is halted for four cycles before the
next instruction is executed.
The user should poll the EEPE bit before starting the read operation. If a write operation is in
progress, it is neither possible to read the EEPROM, nor to change the EEAR Register.
The calibrated Oscillator is used to time the EEPROM accesses. Table 8-2 on page 26 lists the
typical programming time for EEPROM access from the CPU.
Table 8-2.
EEPROM programming time.
Symbol
Number of calibrated RC oscillator cycles
Typical programming time
EEPROM write
(from CPU)
26,368
3.3ms
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