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鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� ATMEGA32-16PC
寤犲晢锛� Atmel
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鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� megaAVR Introduction
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绯诲垪锛� AVR® ATmega
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ATmega32(L)
Errata
ATmega32, rev. A
to F
First Analog Comparator conversion may be delayed
Interrupts may be lost when writing the timer registers in the asynchronous timer
IDCODE masks data from TDI input
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt request.
1.
First Analog Comparator conversion may be delayed
If the device is powered by a slow rising V
CC, the first Analog Comparator conversion will
take longer than expected on some devices.
Problem Fix/Workaround
When the device has been powered or reset, disable then enable theAnalog Comparator
before the first conversion.
2.
Interrupts may be lost when writing the timer registers in the asynchronous timer
The interrupt will be lost if a timer register that is synchronous timer clock is written when the
asynchronous Timer/Counter register (TCNTx) is 0x00.
Problem Fix/Workaround
Always check that the asynchronous Timer/Counter register neither have the value 0xFF nor
0x00 before writing to the asynchronous Timer Control Register (TCCRx), asynchronous-
Timer Counter Register (TCNTx), or asynchronous Output Compare Register (OCRx).
3.
IDCODE masks data from TDI input
The JTAG instruction IDCODE is not working correctly. Data to succeeding devices are
replaced by all-ones during Update-DR.
Problem Fix / Workaround
鈥�
If ATmega32 is the only device in the scan chain, the problem is not visible.
鈥�
Select the Device ID Register of the ATmega32 by issuing the IDCODE instruction or
by entering the Test-Logic-Reset state of the TAP controller to read out the contents
of its Device ID Register and possibly data from succeeding devices of the scan
chain. Issue the BYPASS instruction to the ATmega32 while reading the Device ID
Registers of preceding devices of the boundary scan chain.
鈥�
If the Device IDs of all devices in the boundary scan chain must be captured
simultaneously, the ATmega32 must be the fist device in the chain.
4.
Reading EEPROM by using ST or STS to set EERE bit triggers unexpected interrupt
request.
Reading EEPROM by using the ST or STS command to set the EERE bit in the EECR reg-
ister triggers an unexpected EEPROM interrupt request.
Problem Fix / Workaround
Always use OUT or SBI to set EERE in EECR.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
06FMN-BMTTN-A-TF CONN FMN HSNG 6POS STAG NOR SMD
05FMN-BMTTN-A-TF CONN FMN HSNG 5POS STAG NOR SMD
04FMN-BMTTN-A-TF CONN FMN HSNG 4POS STAG NOR SMD
40FMN-BMTR-A-TB CONN FMN HSNG 40POS SGL REV SMD
36FMN-BMTR-A-TB CONN FMN HSNG 36POS SGL REV SMD
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ATMEGA32-16PI 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 32K FLASH 2KB SRAM 1KB EE RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA32-16PJ 鍔熻兘鎻忚堪:IC MCU AVR 32K 5V 16MHZ 40-DIP RoHS:鏄� 椤炲垾:闆嗘垚闆昏矾 (IC) >> 宓屽叆寮� - 寰帶鍒跺櫒锛� 绯诲垪:AVR® ATmega 妯�(bi膩o)婧�(zh菙n)鍖呰:9 绯诲垪:87C 鏍稿績铏曠悊鍣�:8051 鑺珨灏哄:8-浣� 閫熷害:40/20MHz 閫i€氭€�:UART/USART 澶栧湇瑷�(sh猫)鍌�:POR锛學DT 杓稿叆/杓稿嚭鏁�(sh霉):32 绋嬪簭瀛樺劜鍣ㄥ閲�:32KB锛�32K x 8锛� 绋嬪簭瀛樺劜鍣ㄩ鍨�:OTP EEPROM 澶у皬:- RAM 瀹归噺:256 x 8 闆诲 - 闆绘簮 (Vcc/Vdd):4.5 V ~ 5.5 V 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒:- 鎸暕鍣ㄥ瀷:鍏�(n猫i)閮� 宸ヤ綔婧害:0°C ~ 70°C 灏佽/澶栨:40-DIP锛�0.600"锛�15.24mm锛� 鍖呰:绠′欢
ATmega32-16PU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32kB Flash 1kB EEPROM 32 I/O Pins RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA323 鍒堕€犲晢:ATMEL 鍒堕€犲晢鍏ㄧū:ATMEL Corporation 鍔熻兘鎻忚堪:8-bit Microcontroller with 32K Bytes of In-System Programmable Flash
ATMEGA323(L) 鍒堕€犲晢:鏈煡寤犲 鍒堕€犲晢鍏ㄧū:鏈煡寤犲 鍔熻兘鎻忚堪:ATmega323(L) Summary [Updated 9/03. 18 Pages]