Added the section “Using all Locations of External Memory Smaller than 64 Kby" />
參數(shù)資料
型號(hào): ATMEGA128L-8AU
廠商: Atmel
文件頁(yè)數(shù): 14/24頁(yè)
文件大小: 0K
描述: IC AVR MCU 128K 8MHZ 3V 64TQFP
產(chǎn)品培訓(xùn)模塊: MCU Product Line Introduction
megaAVR Introduction
標(biāo)準(zhǔn)包裝: 90
系列: AVR® ATmega
核心處理器: AVR
芯體尺寸: 8-位
速度: 8MHz
連通性: EBI/EMI,I²C,SPI,UART/USART
外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
輸入/輸出數(shù): 53
程序存儲(chǔ)器容量: 128KB(64K x 16)
程序存儲(chǔ)器類型: 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 64-TQFP
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 614 (CN2011-ZH PDF)
配用: ATSTK600-RC09-ND - STK600 ROUTING CARD AVR
ATSTK600-TQFP64-ND - STK600 SOCKET/ADAPTER 64-TQFP
ATAVRISP2-ND - PROGRAMMER AVR IN SYSTEM
ATJTAGICE2-ND - AVR ON-CHIP D-BUG SYSTEM
ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
ATSTK500-ND - PROGRAMMER AVR STARTER KIT
其它名稱: ATMEGA128L-AU
21
2467XS–AVR–06/11
ATmega128
2.
Added the section “Using all Locations of External Memory Smaller than 64 Kbyte”
on page 32.
3.
Added the section “Default Clock Source” on page 37.
4.
Renamed SPMCR to SPMCSR in entire document.
5.
When using external clock there are some limitations regards to change of frequency.
This is descried in “External Clock” on page 42 and Table 131, “External Clock
Drive,” on page 320.
6.
Added a sub section regarding OCD-system and power consumption in the section
“Minimizing Power Consumption” on page 47.
7.
Corrected typo (WGM-bit setting) for:
“Fast PWM Mode” on page 98 (Timer/Counter0).
“Phase Correct PWM Mode” on page 100 (Timer/Counter0).
“Fast PWM Mode” on page 151 (Timer/Counter2).
“Phase Correct PWM Mode” on page 152 (Timer/Counter2).
8.
Corrected Table 81 on page 191 (USART).
9.
Corrected Table 102 on page 259 (Boundary-Scan)
10. Updated Vil parameter in “DC Characteristics” on page 318.
Rev. 2467E-04/02
1.
Updated the Characterization Data in Section “Typical Characteristics” on page 333.
2.
Updated the following tables:
Table 19 on page 50, Table 20 on page 54, Table 68 on page 157, Table 102 on page 259,
and Table 136 on page 328.
3.
Updated Description of OSCCAL Calibration Byte.
In the data sheet, it was not explained how to take advantage of the calibration bytes for
2MHz, 4MHz, and 8MHz Oscillator selections. This is now added in the following sections:
Improved description of “Oscillator Calibration Register – OSCCAL” on page 41 and “Cali-
bration Byte” on page 289.
Rev. 2467D-03/02
1.
2.
Updated Table 2, “EEPROM Programming Time,” on page 22.
3.
Updated typical Start-up Time in Table 7 on page 37, Table 9 and Table 10 on page 39,
Table 12 on page 40, Table 14 on page 41, and Table 16 on page 42.
4.
Updated Table 22 on page 56 with typical WDT Time-out.
5.
Corrected description of ADSC bit in “ADC Control and Status Register A – ADCSRA”
on page 244.
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