Added the section 鈥淯sing all Locations of External Memory Smaller than 64 Kby" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� ATMEGA128L-8AJ
寤犲晢锛� Atmel
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 14/24闋�(y猫)
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC MCU AVR 128K 8MHZ LV 64-TQFP
鐢�(ch菐n)鍝佸煿瑷�(x霉n)妯″锛� megaAVR Introduction
妯�(bi膩o)婧�(zh菙n)鍖呰锛� 90
绯诲垪锛� AVR® ATmega
鏍稿績铏曠悊鍣細 AVR
鑺珨灏哄锛� 8-浣�
閫熷害锛� 8MHz
閫i€氭€э細 EBI/EMI锛孖²C锛孲PI锛孶ART/USART
澶栧湇瑷�(sh猫)鍌欙細 娆犲妾㈡脯(c猫)/寰�(f霉)浣嶏紝POR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁�(sh霉)锛� 53
绋嬪簭瀛樺劜(ch菙)鍣ㄥ閲忥細 128KB锛�64K x 16锛�
绋嬪簭瀛樺劜(ch菙)鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶у皬锛� 4K x 8
RAM 瀹归噺锛� 4K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 2.7 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 8x10b
鎸暕鍣ㄥ瀷锛� 鍏�(n猫i)閮�
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 64-TQFP
鍖呰锛� 鎵樼洡
閰嶇敤锛� ATSTK501-ND - ADAPTER KIT FOR 64PIN AVR MCU
21
2467XS鈥揂VR鈥�06/11
ATmega128
2.
Added the section 鈥淯sing all Locations of External Memory Smaller than 64 Kbyte鈥�
on page 32.
3.
Added the section 鈥淒efault Clock Source鈥� on page 37.
4.
Renamed SPMCR to SPMCSR in entire document.
5.
When using external clock there are some limitations regards to change of frequency.
This is descried in 鈥淓xternal Clock鈥� on page 42 and Table 131, 鈥淓xternal Clock
Drive,鈥� on page 320.
6.
Added a sub section regarding OCD-system and power consumption in the section
鈥淢inimizing Power Consumption鈥� on page 47.
7.
Corrected typo (WGM-bit setting) for:
鈥淔ast PWM Mode鈥� on page 98 (Timer/Counter0).
鈥淧hase Correct PWM Mode鈥� on page 100 (Timer/Counter0).
鈥淔ast PWM Mode鈥� on page 151 (Timer/Counter2).
鈥淧hase Correct PWM Mode鈥� on page 152 (Timer/Counter2).
8.
Corrected Table 81 on page 191 (USART).
9.
Corrected Table 102 on page 259 (Boundary-Scan)
10. Updated Vil parameter in 鈥淒C Characteristics鈥� on page 318.
Rev. 2467E-04/02
1.
Updated the Characterization Data in Section 鈥淭ypical Characteristics鈥� on page 333.
2.
Updated the following tables:
Table 19 on page 50, Table 20 on page 54, Table 68 on page 157, Table 102 on page 259,
and Table 136 on page 328.
3.
Updated Description of OSCCAL Calibration Byte.
In the data sheet, it was not explained how to take advantage of the calibration bytes for
2MHz, 4MHz, and 8MHz Oscillator selections. This is now added in the following sections:
Improved description of 鈥淥scillator Calibration Register 鈥� OSCCAL鈥� on page 41 and 鈥淐ali-
bration Byte鈥� on page 289.
Rev. 2467D-03/02
1.
2.
Updated Table 2, 鈥淓EPROM Programming Time,鈥� on page 22.
3.
Updated typical Start-up Time in Table 7 on page 37, Table 9 and Table 10 on page 39,
Table 12 on page 40, Table 14 on page 41, and Table 16 on page 42.
4.
Updated Table 22 on page 56 with typical WDT Time-out.
5.
Corrected description of ADSC bit in 鈥淎DC Control and Status Register A 鈥� ADCSRA鈥�
on page 244.
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
39-51-3084 CONN FFC VERT 8POS 1.25MM ZIF
39-51-3083 CONN FFC 8POS 1.25MM RT ANG ZIF
39-51-3074 CONN FFC VERT 7POS 1.25MM ZIF
39-51-3073 CONN FFC 7POS 1.25MM RT ANG ZIF
39-51-3064 CONN FFC VERT 6POS 1.25MM ZIF
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
ATMEGA128L-8AN 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 128KB FLASH,5V 4KB EE 4KB SRAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA128L-8ANR 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU AVR 128KB FLASH,5V 4KB EE 4KB SRAM RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA128L8AU 鍒堕€犲晢:Atmel Corporation 鍔熻兘鎻忚堪:
ATmega128L-8AU 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 128kB Flash 4kB EEPROM 53 I/O Pins RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
ATMEGA128L-8AU SL861 鍒堕€犲晢:Atmel Corporation 鍔熻兘鎻忚堪: