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參數(shù)資料
型號: ATF22V10BQ-15SI
廠商: Atmel
文件頁數(shù): 12/16頁
文件大?。?/td> 0K
描述: IC PLD EE 15NS QTR PWR 24-SOIC
標準包裝: 1
系列: 22V10
可編程類型: EE PLD
宏單元數(shù): 10
輸入電壓: 5V
速度: 15ns
安裝類型: 表面貼裝
封裝/外殼: 24-SOIC(0.295",7.50mm 寬)
供應(yīng)商設(shè)備封裝: 24-SOIC W
包裝: 管件
其它名稱: Q1324095
5
0250M–PLD–7/10
Atmel ATF22V10B
6.
Input Test Waveforms and Measurement Levels
t
R,tF < 3ns
7.
Output Test Loads
* All except -7 which is R2 = 300
8.
Pin Capacitance
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested
9.
Power-up Reset
The registers in the Atmel ATF22V10B are designed to reset during power-up. At a point delayed slightly from
V
CC crossing VRST, all registers will be reset to the low state. The output state will depend on the polarity of the out-
put buffer.
This feature is critical for state machine initialization. However, due to the asynchronous nature of reset and the
uncertainty of how V
CC actually rises in the system, the following conditions are required:
1. The V
CC rise must be monotonic
2. After reset occurs, all input and feedback setup times must be met before driving the clock pin high
3. The clock must remain stable during t
PR
Commercial
Military
f = 1MHz, T = 25°C(1)
Typ
Max
Units
Conditions
C
IN
5
8
pF
V
IN =0V
C
OUT
6
8
pF
V
OUT =0V
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