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參數(shù)資料
| 型號： | ATF20V8CZQ |
| 廠商： | Atmel Corp. |
| 英文描述： | High-performance EE PLD(高性能可電擦除可編程邏輯器件（PLD)) |
| 中文描述： | 高性能電子工程的PLD（高性能可電擦除可編程邏輯器件（PLD）中） |
| 文件頁數(shù)： | 1/3頁 |
| 文件大?。?/td> | 69K |
| 代理商： | ATF20V8CZQ |
1
Features
Edge-controlled Power-down Pin
Zero Power Equivalent of ATF20V8B
Edge-sensing Zero Standby Power (10
μ
A Typical)
Industry Standard Architecture
– Emulates Many 24-pin PALs
– Low-cost Easy-to-use Software Tools
High-speed Electrically-erasable Programmable Logic Devices
– 10 ns Maximum Pin-to-pin Delay
CMOS and TTL Compatible Inputs and Outputs
– Latch Feature Hold Outputs to Previous Logic States
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High-reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Commercial, and Industrial Temperature Ranges
Dual-in-line and Surface Mount Packages in Standard Pinouts
PCI-compliant
Block Diagram
High-
performance
EE PLD
ATF20V8CZ
ATF20V8CZQ
Advance
Information
Rev. 0454G–03/00
Pin Configurations
All Pinouts Top View
Pin Name
Function
CLK
Clock
IN
Logic Inputs
I/O
Bi-directional Buffers
OE
Output Enable
*
No Internal Connection
VCC
+5V Supply
TSSOP
12
13
CLK/IN
IN
GND
OE/IN
PLCC
5
6
7
8
9
10
11
25
24
23
22
21
20
19
IN
IN
IN
*
IN
IN
IN
I/O
I/O
I/O
*
I/O
I/O
I/O
4
3
2
1
2
2
2
1
1
1
1
1
1
1
I
I
G
*
O
I
I
I
I
C
*
V
I
I
DIP
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
OE/IN
1
2
3
4
5
6
7
8
9
10
11
24
23
22
21
20
19
18
17
16
15
14
IN
IN
IN
IN
IN
IN
IN
IN
IN
VCC
IN
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
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